EP7312-CB-90 CIRRUS [Cirrus Logic], EP7312-CB-90 Datasheet - Page 43

• Manufacturer Part Number: EP7312-CB-90
• Description: HIGH-PERFORMANCE, LOW-POWER SYSTEM ON CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE
• Manufacturer: CIRRUS [Cirrus Logic]

DS508PP5
J2
J3
J18
J19
J20
K1
K2
K3
K18
K19
K20
L1
L2
L3
L18
L19
L20
M1
M2
M3
M18
M19
M20
N1
N2
N3
N18
N19
N20
P1
P2
P3
P18
P19
Ball Location
PA[5]
PA[6]
A[11]
D[13]
A[13]/DRA[14]
PA[1]
PA[2]
VDDIO
D[14]
A[14]/DRA[13]
D[15]
TXD[1]
LEDDRV
PA[3]
VDDIO
D[16]
A[16]/DRA[11]
RXD[1]
CTS
PA[0]
A[15]/DRA[12]
A[17]/DRA[10]
nTRST
DSR
nTEST[1]
PHDIN
D[17]
D[19]
A[18]/DRA[9]
EINT[3]
nEINT[2]
DCD
D[18]
A[20]/DRA[7]
Name
Strength
With p/u*
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Table 21. 204-Ball TFBGA Ball Listing (Continued)
†
©
C opyright Cirrus Logic, Inc. 2003
Input
Input
Input
Input
Input
Input
Reset
State
High
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
‡
‡
‡
‡
‡
‡
(All Rights Reserved)
Pad power
Pad power
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
GPIO port A
GPIO port A
System byte address
Data I/O
System byte address / SDRAM address
GPIO port A
GPIO port A
Digital I/O power, 3.3V
Data I/O
System byte address / SDRAM address
Data I/O
UART 1 transmit data out
IR LED drive
GPIO port A
Digital I/O power, 3.3V
Data I/O
System byte address / SDRAM address
UART 1 receive data input
UART 1 clear to send input
GPIO port A
System byte address / SDRAM address
System byte address / SDRAM address
JTAG async reset input
UART 1 data set ready input
Test mode select input
Photodiode input
Data I/O
Data I/O
System byte address / SDRAM address
External interrupt
External interrupt input
UART 1 data carrier detect
Data I/O
System byte address / SDRAM address
High-Performance, Low-Power System on Chip
Description
EP7312
43