Z86C8316PEC ZILOG [Zilog, Inc.], Z86C8316PEC Datasheet - Page 29

• Manufacturer Part Number: Z86C8316PEC
• Description: Z8 MCU MICROCONTROLLERS
• Manufacturer: ZILOG [Zilog, Inc.]

Z86C83/C84
Z8
FUNCTIONAL DESCRIPTION (Continued)
Channel Select (bits 2, 1, 0).
Note: *The desired P2 bit must be set equal 1 to allow Port bit
ias ADC input.
29
ADC1 Bank C, Register 9
ADC0 (A) Bank C, Register 8
SCAN
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
®
CSEL2
Figure 24. ADC Control Register 1 (Read/Write)
Figure 23. ADC Control Register 0 (Read/Write)
0
1
MCU Microcontrollers
* Default After Reset
0
0
0
0
1
1
1
1
No action*
Convert channel then stop
CSEL1
0
0
1
1
0
0
1
1
Must be 0.
D5 D4
0
1
0
1
Reserved (Must be 1.)
ADE
0 Disable*
1 Enable
0
0
1
1
CSEL0
CSEL1
CSEL2
SCAN
A
Must be D7 = 0
CSEL0
0 = No action. *
1 = Convert, then stop.
0 = No action *
1 = Enable selected channel
IN
50 % AGND Offset
35% AGND Offset
Reserved
No Offset
/Input/Output Control
0
1
0
1
0
1
0
1
(D
on associated Port 20-27
2
,D
D6 = 0
D5 = 1
1
,D
0
) as analog input
Channel
0 (P20)*
1 (P21)
2 (P22)
3 (P23)
4 (P24)
5 (P25)
6 (P26)
7 (P27)
ADE (bit 7). A zero disables any A/D conversions or
accessing any ADC registers except writing to ADE bit. A
one Enables all ADC accesses. ADC result register is
shown in Figure 25.
ADR Bank C, Register A
D7 D6 D5 D4 D3 D2 D1 D0
Reg E
Reg D
Reg C
Reg B
Reg A
Reg F
Reg 9
Reg 8
Reg 7
Reg 6
Reg 5
Reg 4
Reg 3
Reg 2
Reg 1
Reg 0
Figure 25. Result Register (Read-Only)
AD Control 1
AD Control 0
AD Result 1
Figure 26. Bank C
Data
These registers
can be accessed.
DS96DZ80203