Z86C8316PEC ZILOG [Zilog, Inc.], Z86C8316PEC Datasheet - Page 38

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Z86C8316PEC

Manufacturer Part Number
Z86C8316PEC
Description
Z8 MCU MICROCONTROLLERS
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet
Z86C83/C84
Z8
WDT Time Select (D1, D0). Selects the WDT time-out
period. It is configured as shown in Table 14.
D1
0
0
1
1
Notes:
The default on a WDT initiated reset is 512 SCLK.
The minimum time shown is for V
WDT During HALT (D2). This bit determines whether or
not the WDT is active during HALT mode. A "1" indicates
active during HALT. The default is "1."
Note: If WDT is permanently selected (always ON mode),
the WDT will continue to run even if set not to run in STOP
or HALT Mode.
WDT During STOP (D3). This bit determines whether or
not the WDT is active during STOP mode. Since XTAL
clock is stopped during STOP mode, unless as specified
below, the on-board RC has to be selected as the clock
source to the POR counter. A "1" indicates active during
STOP. The default is "1". If bits D3 and D4 are both set to
"1," the WDT only, is driven by the external clock during
STOP mode.
38
WDTMR (F) 0F
D7 D6 D5 D4 D3 D2 D1 D0
®
MCU Microcontrollers
Figure 39. Watch-Dog Timer Mode Register
*
† XTAL=SCLK/TCLK shown
D0
0
1
0
1
Table 14. WDT Time Select (Min. @ 5.0V)
Default setting after RESET
Time-Out of
Internal RC OSC
6.25 ms min
12.5 ms min
25 ms min
100 ms min
(Write Only)
CC
@ 5.0V.
WDT TAP
WDT During HALT
0 OFF
1 ON
WDT During STOP
0 OFF
1 ON
XTAL1/INT RC Select for WDT
0 On-Board RC
1 XTAL
Reserved (Must be 0)
00
01
10
11
Time-Out of
SCLK Clock
256 SCLK
512 SCLK*
1024 SCLK
4096 SCLK
*
*
4096 SCLK
256
512
1024 SCLK
SCLK
SCLK *
*
Notes:
1. If WDT is permanently selected (always ON mode),
2. WDT instructions affect the Z (Zero), S (Sign), and V
On-Board, Power-On-Reset RC or External XTAL1
Oscillator Select (D4). This
oscillator source is used to clock the internal POR and
WDT counter chain. If the bit is a "1," the internal RC
oscillator is bypassed and the POR and WDT clock source
is driven from the external pin, XTAL1. The default
configuration of this bit is 0, which selects the RC
oscillator. If the XTAL1 pin is selected as the oscillator
source for the WDT, during Stop Mode, the oscillator will
be stopped and the WDT will not run. This is true even if
the WDT is selected to run during Stop Mode.
V
tor checks that V
operation of the device. RESET is globally driven if V
below the specified voltage (typically 2.6V).
ROM Protect. ROM Protect is mask-programmable. It is
selected by the customer at the time the ROM code is
submitted.
ROM Mask Selectable Options
There are six ROM mask options that must be selected at
the time the ROM mask is ordered (ROM code submitted).
Option
Permanent WDT
Port0 Pull-Ups
Port0 Auto Latches
ROM Protect
RAM Protect
CC
Voltage Comparator. An on-board Voltage Compara-
the WDT will continue to run even if set not to run in
STOP or HALT Mode.
(Overflow) flags.
Table 15. ROM Mask Selectable Options
CC
is at the required level to ensure correct
bit
Selection
Yes/No
Yes/No
Yes/No
Yes/No
Yes/No
determines
DS96DZ80203
which
CC
is

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