Z86D99 ZILOG [Zilog, Inc.], Z86D99 Datasheet - Page 22

• Manufacturer Part Number: Z86D99
• Description: Low-Voltage Micro controllers with ADC
• Manufacturer: ZILOG [Zilog, Inc.]

PS003807-1002
Interrupts
The Z86D99/Z86L99 family allows up to six different interrupts, three external and
three internal, from nine possible sources. The six interrupts are assigned as fol-
lows:
•
•
•
•
Table 3 presents the interrupt types, the interrupt sources, and the location of the
specific interrupt vectors.
Table 3. Interrupt Types, Sources, and Vectors
These interrupts can be masked and their priorities set by using the Interrupt
Mask Register (IMR) and Interrupt Priority Register (IPR) (Figure 8.) When more
than one interrupt is pending, priorities are resolved by a priority encoder, con-
trolled by the IPR.
Name
IRQ
IRQ
IRQ
IRQ
IRQ
IRQ
Notes:
Three edge-triggered external interrupts (P51, P52, and P53), two of which
are shared with the two analog comparators
One internal interrupt assigned to the T8 Timer
One internal interrupt assigned to the T16 Timer
One internal interrupt shared between the Low-Battery Detect flag and the T1
Timer
0
1
2
3
4
5
Source
P52 (F/R), Comparator 2
P53 (F)
P51 (R/F), Comparator 1
T16 Timer
T8 Timer
LVD, T1 Timer
F = Falling-edge triggered; R = Rising-edge triggered.
When LVD is enabled, IRQ5 is triggered only by low-voltage detection. Timer
1 does not generate an interrupt.
P
R
E
L
I
M
Vector
Location Comments
0,1
2,3
4,5
6,7
8,9
10,11
Z86D990/Z86D991 OTP and Z86L99X ROM
I
Low-Voltage Microcontrollers with ADC
N
A
External interrupt (P52) is triggered by
either rising or falling edge; internal
interrupt generated by Comparator 2
is mapped into IRQ
External interrupt (P53) is triggered by
a falling edge
External interrupt (P51) is triggered by
either a rising or falling edge; internal
interrupt generated by Comparator 1
is mapped into IRQ
Internal interrupt
Internal interrupt
Internal interrupt, LVD flag is
multiplexed with T1 Timer End-of-
Count interrupt
R
Y
0
2
15