X4005 XICOR [Xicor Inc.], X4005 Datasheet - Page 12
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X4005
Manufacturer Part Number
X4005
Description
CPU Supervisor
Manufacturer
XICOR [Xicor Inc.]
Datasheet
1.X4005.pdf
(18 pages)
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X4003/X4005
TIMING DIAGRAMS
Bus Timing
WP Pin Timing
Write Cycle Timing
Nonvolatile Write Cycle Timing
Note: (7) t
REV 1.1.3 4/30/02
SDA OUT
Symbol
SDA IN
t
WC
SCL
SDA
SCL
It is the minimum cycle time to be allowed for any nonvolatile write by the user, unless Acknowledge Polling is used.
(7)
WC
is the time from a valid stop condition at the end of a write sequence to the end of the self-timed internal nonvolatile write cycle.
t
SU:STA
SDA IN
SCL
WP
Write cycle time
8
th
Bit of Last Byte
t
HD:STA
Start
t
F
Parameter
t
SU:WP
t
SU:DAT
t
HIGH
Clk 1
ACK
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t
LOW
Slave Address Byte
t
HD:DAT
Condition
Min.
Stop
t
R
t
A
t
HD:WP
t
Characteristics subject to change without notice.
Clk 9
Typ.
WC
5
t
DH
(1)
Condition
Start
Max.
10
t
BUF
t
SU:STO
Unit
ms
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