X5083V8IZ-2.7A INTERSIL [Intersil Corporation], X5083V8IZ-2.7A Datasheet - Page 17

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X5083V8IZ-2.7A

Manufacturer Part Number
X5083V8IZ-2.7A
Description
CPU Supervisor with 8Kbit SPI EEPROM
Manufacturer
INTERSIL [Intersil Corporation]
Datasheet
RESET Output Timing
NOTES:
CS vs. RESET Timing
RESET Output Timing
5. This parameter is periodically sampled and not 100% tested.
6. PT = Package/Temperature
t
RPD
t
t
SYMBOL
R
F
SYMBOL
V
t
(Note 5)
V
(Note 5)
PURST
RVALID
t
t
t
(Note 5)
WDO
TRIP
CST
RST
Reset trip point voltage, X5083PT-4.5A (Note 6)
Reset trip point voltage, X5083PT
Reset trip point voltage, X5083PT-2.7A
Reset trip point voltage, X5083PT-2.7
Power-up reset time out
V
V
V
Reset valid V
Watchdog time out period,
CS pulse width to reset the watchdog
Reset time out
CC
CC
CC
WD1 = 1, WD0 = 1(default)
WD1 = 1, WD0 = 0
WD1 = 0, WD0 = 1
WD1 = 0, WD0 = 0
detect to reset/output
fall time
rise time
RESET
17
CC
CS
PARAMETER
PARAMETER
t
WDO
t
CST
X5083
t
RST
MIN
100
450
400
100
t
WDO
1
4.25
2.85
2.55
MIN
100
4.5
0.1
0.1
1
t
RST
TYP
OFF
200
600
200
1.4
TYP
4.63
4.38
2.93
2.63
200
MAX
300
800
300
2
MAX
4.75
3.00
280
500
4.5
2.7
June 15, 2006
UNIT
sec
ms
ms
ms
ns
UNIT
ms
ns
ns
ns
FN8127.3
V
V

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