ATA5811_06 ATMEL [ATMEL Corporation], ATA5811_06 Datasheet - Page 48
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ATA5811_06
Manufacturer Part Number
ATA5811_06
Description
UHF ASK/FSK TRANSCEIVER
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.ATA5811_06.pdf
(92 pages)
- Current page: 48 of 92
- Download datasheet (2Mb)
10.6
10.7
10.8
48
Command: Delete IRQ
Command Structure
4-wire Serial Interface
ATA5811/ATA5812
The delete IRQ command sets pin IRQ to low.
Figure 10-6. Delete IRQ
The three most significant bits of the command (Bit 5 to Bit 7) indicates the command type. Bit 0
to Bit 4 describes the target address when reading or writing a control or status register. In all
other commands Bit 0 to Bit 4 have no effect and should be set to 0 for compatibility reasons
with future products.
Table 10-1.
The 4-wire serial interface consists of the Chip Select (CS), the Serial ClocK (SCK), the Serial
Data Input (SDI_TMDI) and the Serial Data Output (SDO_TMDO). Data is transmitted/received
bit by bit in synchronization with the serial clock.
Note:
When CS is low and the transparent mode is inactive (T_MODE = 0), SDO_TMDO is in a
high-impedance state. When CS is low and the transparent mode is active (T_MODE = 1), the
RX data stream is available on pin SDO_TMDO.
Read TX/RX data buffer
Write TX/RX data buffer
Read control/status register
Write control register
OFF command
Delete IRQ
Not used
Not used
If the output level on pin N_RESET is low, no data communication with the microcontroller is
possible.
Command
Command Structure
SDO_TMDO
SDI_TMDI
MSB
Bit 7
0
0
0
0
1
1
1
1
SCK
CS
Bit 6
0
0
1
1
0
0
1
1
MSB
Nr. Bytes in the TX/RX Data Buffer
Command: Delete IRQ
Bit 5
0
1
0
1
0
1
0
1
Bit 4
A4
A4
X
X
X
X
x
x
LSB
Bit 3
A3
A3
X
X
X
X
x
x
Bit 2
A2
A2
X
X
X
X
x
x
Bit 1
4689F–RKE–08/06
A1
A1
X
X
X
X
x
x
Bit 0
LSB
A0
A0
X
X
X
X
x
x
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