X4283 INTERSIL [Intersil Corporation], X4283 Datasheet - Page 16
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X4283
Manufacturer Part Number
X4283
Description
CPU Supervisor with 128K EEPROM
Manufacturer
INTERSIL [Intersil Corporation]
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X4283/85 – Preliminary Information
TIMING DIAGRAMS
Bus Timing
WP Pin Timing
Write Cycle Timing
Nonvolatile Write Cycle Timing
Note: (1) t
REV 1.17 11/27/00
SDA OUT
Symbol
SDA IN
t
WC
SCL
SCL
SDA
It is the minimum cycle time to be allowed for any nonvolatile write by the user, unless Acknowledge Polling is used.
(1)
WC
is the time from a valid stop condition at the end of a write sequence to the end of the self-timed internal nonvolatile write cycle.
t
SU:STA
SDA IN
SCL
WP
8
th
Bit of Last Byte
t
HD:STA
t
F
START
Write Cycle Time
t
SU:WP
Parameter
t
SU:DAT
Clk 1
t
HIGH
ACK
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t
LOW
Slave Address Byte
t
HD:DAT
Condition
Stop
Min.
t
R
t
t
AA
HD:WP
Clk 9
Characteristics subject to change without notice.
t
WC
Typ.
t
DH
5
(1)
Condition
Start
Max.
10
t
BUF
t
SU:STO
Unit
ms
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