AK4440 AKM [Asahi Kasei Microsystems], AK4440 Datasheet - Page 19
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AK4440
Manufacturer Part Number
AK4440
Description
192kHz 24-Bit 8ch DAC with 2Vrms Output
Manufacturer
AKM [Asahi Kasei Microsystems]
Datasheet
1.AK4440.pdf
(31 pages)
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Quantity
Price
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■
The AK4440 is in power down mode upon power-up. The MLCK should be input after the power supplies are ramped
up. The AK4440 is in power-down mode until LRCK are input.
Notes:
(1) The AK4440 includes an internal Power on Reset Circuit which is used reset the digital logic into a default state
(2) Register writings are valid after 10ms (max).
(3) When internal reset is released, approximately 20us after a MCLK input, the internal analog circuit is powered-up.
(4) The digital circuit and charge pump circuit are powered-up in 8~10 LRCK cycles when the analog circuit is
(5) The charge pump counter starts after the charge pump circuit is powered-up. The DAC outputs a valid analog signal
MS1088-E-01
D/A In
(Digital)
Power Supply
(VDD, AVDD)
MCLK
Internal
Reset
Audio circuit
Charge Pump
Circuit
VEE Pin
D/A Out
(Analog)
System Reset
powered-up.
after power up. Therefore, the power supply voltage must reach 80% VDD from 0.3V in less than 20msec.
after Time A.
Time A = 1024/(fs x 16): Normal speed mode
Time A = 1024/(fs x 8): Double speed mode
Time A = 1024/(fs x 4): Quad speed mode
0.8xVDD
0.3V
0V
0V
Power down
t
W<20ms
(1)
Reset
10ms (max)
MUTE (D/A Out)
(2)
Figure 19. System Reset Diagram
20 µs
(3)
“0” data
8~10
LRCK Clocks
(4)
Time A
- 19 -
(5)
Active (D/A Out)
Reset Release
Power-up
Power-up
[AK4440]
2011/03