78Q8392L/A03 TERIDIAN [Teridian Semiconductor Corporation], 78Q8392L/A03 Datasheet - Page 3
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78Q8392L/A03
Manufacturer Part Number
78Q8392L/A03
Description
Low Power Ethernet Coaxial Transceiver
Manufacturer
TERIDIAN [Teridian Semiconductor Corporation]
Datasheet
1.78Q8392LA03.pdf
(14 pages)
JABBER FUNCTION
When valid data on the TX± pins is detected, the
jabber timer is started. If there is valid data for more
than 20 ms, a latch is set which disables the
transmitter output and enables the 10 MHz output on
the CD± pins. The latch is reset within 0.5 seconds
after the valid data is removed from the transmitter
input (TX±). This action resets the jabber timer and
disables the 10 MHz signal on the CD± pins. The
TX± inputs must remain inactive during the 0.5
second reset period.
Page: 3 of 14
DATA MEDIA
CDS
TXO
RXI
OUTPUT DRIVER
RECEIVER
BUFFER
TRANSMIT
INPUT
FIGURE 1: 78Q8392L/A03 General System Block Diagram
TX ON
LP FILTER
EQUALIZER
THRESHOLD
COLLISION
CONTROL LOGIC
©
HEART BEAT TIMER
BLANKING TIMER
JABBER TIMER
THRESHOLD
2008 Teridian Semiconductor Corporation
SQUELSH
COMPARATOR
SLICER
SQUELCH
COMPARATOR
COLLISION
END TRANSMIT
NARROW
TX DATA VALID
TX± DISABLE
PULSE
FILTER
SHAPING
CD ± ON
FILTER
PULSE
HEARTBEAT FUNCTION
The 10 MHz CD outputs are enabled for about 1 µs
at approximately 1.1 µs after the end of each
transmission. The heartbeat signal tells the DTE that
the circuit is functioning. This is implemented by
starting the heartbeat timer when the valid data
signal indicates the end of a transmission. This
function is disabled when HBE pin is tied to V
TRANSITION
PERIOD
TAMER
TRANSITION
TRANSITION
PERIOD
TIMER
TIMER
END
RX DATA
10 MHz
OSC
VALID
SLICER
NARROW
FILTER
PULSE
ENABLE
TX ± < -250 mV
TX ± > -250 mV
BUFFERED TX
AND CURRENT
REFERENCE
REFERENCE
BANDGAP
RX+
RX-
Low Power Ethernet
Coaxial Transceiver
PRESET
DETECT
SIGNAL
COMPARATOR
78Q8392L/A03
ENABLE
TRANSMIT INPUT
BUFFER
TX DISABLE
CD+
CD-
RR+
RR-
TX+
TX-
Rev 1.3
EE.