WM9707_06 WOLFSON [Wolfson Microelectronics plc], WM9707_06 Datasheet

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AC’97 Revision 2.1 Audio CODEC with SPDIF Output DESCRIPTION WM9707 is a high-quality stereo audio CODEC compliant with the AC’97 Revision 2.1 specification. It performs full duplex 18-bit CODEC functions and supports variable sample rates from 8 to 48k ...

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WM9707 DESCRIPTION .......................................................................................................1 AC’97 FEATURES .................................................................................................1 BLOCK DIAGRAM .................................................................................................1 TABLE OF CONTENTS .........................................................................................2 PIN CONFIGURATION...........................................................................................3 ORDERING INFORMATION ..................................................................................3 ABSOLUTE MAXIMUM RATINGS.........................................................................4 RECOMMENDED OPERATING CONDITIONS .....................................................5 ELECTRICAL CHARACTERISTICS ......................................................................5 PIN DESCRIPTION ................................................................................................8 DETAILED TIMING DIAGRAMS ............................................................................9 AC-LINK LOW POWER MODE...................................................................................... 9 ...

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WM9707 PIN CONFIGURATION DVDD1 1 XTLIN 2 XTLOUT 3 DVSS1 4 5 SDATAOUT 6 BITCLK 7 DVSS2 SDATIN 8 DVDD2 9 SYNC 10 RESETB 11 PCBEEP ...

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WM9707 ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously operating at or beyond these limits. Device functional operating limits and guaranteed performance specifications are given under Electrical Characteristics ...

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WM9707 RECOMMENDED OPERATING CONDITIONS PARAMETER Digital supply range Analogue supply range Digital ground Analogue ground Difference DVSS to AVSS Analogue supply current Digital supply current Standby supply current (all PRs set) Analogue supply current Digital supply current Standby supply current ...

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WM9707 Test Characteristics: AVDD = 5V, GND = 0V …………..T A DVDD = 3.3V, GND = 0V …………..T PARAMETER DAC Circuit Specifications (AVDD = 5V) 48kHz sampling SNR A-weighted (Note 1) Full scale output voltage THD Frequency response Transition band ...

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WM9707 Test Characteristics: AVDD = 5V, GND = 0V …………..T A DVDD = 3.3V, GND = 0V …………..T PARAMETER ADC Circuit Specifications (AVDD = 3.3V) 48kHz sampling SNR A-weighted (Note 1) ADC input for full scale output THD Frequency response ...

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WM9707 PIN DESCRIPTION PIN NAME 1 DVDD1 XTLIN 2 XTLOUT 3 4 DVSS1 5 SDATAOUT 6 BITCLK 7 DVSS2 8 SDATAIN DVDD2 9 SYNC 10 RESETB 11 12 PCBEEP 13 PHONE 14 AUXL 15 AUXR 16 VIDEOL VIDEOR 17 18 ...

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WM9707 DETAILED TIMING DIAGRAMS Test Characteristics: AVDD = 5V, GND = 0V …………..T DVDD = 3.3V, GND = 0V …………..T All measurements are taken at 10% to 90% VDD, unless otherwise stated. All the following timing information is guaranteed, not ...

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WM9707 WARM RESET BITCLK Figure 3 Warm Reset Timing SYNC active high pulse width SYNC inactive to BITCLK startup delay CLOCK SPECIFICATIONS BITCLK Figure 4 Clock Specifications (50pF External Load) Note: Worst case duty cycle restricted to 40/60. PARAMETER BITCLK ...

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WM9707 DATA SETUP AND HOLD (50pF EXTERNAL LOAD) BITCLK SDATAOUT Figure 5 Data Setup and Hold (50pF External Load) Note: Setup and hold time parameters for SDATAIN are with respect to AC’97 Controller. PARAMETER Setup to falling edge of BITCLK ...

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WM9707 SYSTEM INFORMATION Figure 7 Functional Block Diagram w Production Data PD Rev 4.1 June 2006 12 ...

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WM9707 MIC2 22 RESET 11 AC'97 BITCLK 6 DIGITAL SYNC 10 CONTROLLER SDATAIN 8 SDATAOUT 5 45 CID Figure 8 Revision 2.1 Compliant 2-Channel CODEC Figure 9 WM9707 Channel System w CD, VIDEO, AUX, LINEINL/R MIC1 PCBEEP ...

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WM9707 SDATAOUT BITCLK SDATAIN SYNC RESETB Option of using RESETB or SDATAIN to disable PC I/O NB CODEC when docked. CHIPSET OR AC'97 CONTROLLER CID SDATAOUT BITCLK SDATAIN WM9707 SYNC RESETB If pin CID is not driven then CODEC ID ...

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WM9707 DEVICE DESCRIPTION INTRODUCTION The WM9707 is fully compliant with Revision 2.1 of the AC’97 specification. The WM9707 comprises a stereo 18-bit CODEC, (that is, 2 ADCs and 2 DACs) a comprehensive analogue mixer with 4 sets of stereo inputs, ...

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WM9707 There is no provision for pseudo-stereo effects. Mono signals will have no enhancement applied (if the signals are in phase and of the same amplitude). Signals from the PCM DAC channels can have stereo enhancement applied. It can also ...

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WM9707 MASTER/SLAVE ID SUPPORT WM9707 supports operation as either a master or a slave CODEC. Configuration of the device as either a master slave, is selected by tying the CID pin 45 on the package. Fundamentally, a ...

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WM9707 TAG PHASE SYNC 12.288MHz 81.4ns BITCLK VALID SLOT(1) SLOT(2) SDATAOUT FRAME TIME SLOT 'VALID' BITS END OF PREVIOUS ('1' = TIME SLOT CONTAINS AUDIO FRAME VALID PCM DATA) Figure 12 AC-link Audio Output Frame The datastreams currently defined by ...

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WM9707 AC-LINK AUDIO OUTPUT FRAME (SDATAOUT) The audio output frame data streams correspond to the multiplexed bundles of all digital output data targeting the WM9707’s DAC inputs, and control registers. As briefly mentioned earlier, each audio output frame supports up ...

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WM9707 As an example, consider an 8-bit sample stream that is being played out to one of the WM9707’s DACs. The first 8 bit positions are presented to the DAC (MSB justified) followed by the next 12 bit positions, which ...

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WM9707 SLOTS SURROUND SOUND DATA Audio output frame slots are used to send surround sound data. SLOTS 10 AND 11: LINE2 AND HANDSET DAC These data slots are not supported. SLOT 12: GPIO CONTROL ...

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WM9707 BITCLK SDATAIN Figure 15 Start of an Audio Input Frame A new audio input frame begins with a low to high transition of SYNC as shown in Figure 15. SYNC is synchronous to the rising edge of BITCLK. On ...

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WM9707 SLOT 4: PCM RECORD RIGHT CHANNEL Audio input frame slot 4 is the right channel output of the WM9707’s input Mux, post-ADC. The WM9707’s ADCs can be implemented to support 16, 18, or 20-bit resolution. The WM9707 ships out ...

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WM9707 WARM WM9707 RESET A warm WM9707 reset will re-activate the AC-link without altering the current WM9707 register values. A warm reset is signalled by driving SYNC high for a minimum the absence of BITCLK. Within ...

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WM9707 MUTE Table 5 Volume Register Function MASTER TONE CONTROL REGISTERS (INDEX 08h) Optional register for support of tone controls (bass and treble). The WM9707 does not support bass and treble and writing to this register ...

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WM9707 SR2 TO SR0 Table 8 Record Select Register Function RECORD GAIN REGISTERS (INDEX 1Ch) 1Ch is for the stereo input and 1Eh is for the optional special purpose correlated audio Mic channel. Each step corresponds to 1.5dB. 22.5dB corresponds ...

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WM9707 POWERDOWN CONTROL/STATUS REGISTER (INDEX 26h) This read/write register is used to program Powerdown states and monitor subsystem readiness. The lower half of this register is read only status indicating that the subsection is ready. Ready is defined ...

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WM9707 The part will remain in sleep mode with all its registers holding their static values. To wake up the WM9707, the AC’97 controller will send a pulse on the sync line issuing a warm reset. This will restart the ...

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WM9707 REGISTER 2Ah – EXTENDED AUDIO STATUS AND CONTROL REGISTER The Extended Audio Status and Control Register is a read/write register that provides status and control of the extended audio features. DATA BIT VRA DRA VRM CDAC SDAC LDAC MADC ...

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WM9707 VENDOR SPECIFIC GAIN CONTROL REGISTERS – (INDEX 72h) This register controls the gain and mute functions applied to the mixer path. This PGA is not accommodated in the Intel specification, but is required in order to allow the option ...

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WM9707 SERIAL INTERFACE REGISTER MAP The following table shows the function and address of the various control bits that are loaded through the serial interface during write operations. Reg Name D15 D14 D13 00h Reset X SE4 SE3 02h Master ...

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WM9707 RECOMMENDED EXTERNAL COMPONENTS MIXER INPUTS MASTER/ SLAVE SELECT AVSS AC-LINK Notes C24 should be as close to WM9707 as possible. 2. AGND and DGND should be connected as close to WM9707 as possible required ...

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WM9707 RECOMMENDED EXTERNAL COMPONENTS VALUES COMPONENT SUGGESTED REFERENCE VALUE 100nF C5 to C17 470nF C18 1 F C19 0.1 F C20 10 F C21 0.1 F C22 10 F C23 100nF C24 47nF C25 to C29 10 ...

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WM9707 PACKAGE DIMENSIONS FT: 48 PIN TQFP ( 1.4 mm Dimensions Symbols (mm) MIN NOM A ----- ----- A 0.05 ----- 1 A 1.35 1. ...

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... Wolfson’s approval, licence, warranty or endorsement thereof. Any third party trade marks contained in this document belong to the respective third party owner. Reproduction of information from Wolfson datasheets is permissible only if reproduction is without alteration and is accompanied by all associated copyright, proprietary and other notices (including this notice) and conditions. Wolfson is not liable for any unauthorised alteration of such information or for any reliance placed thereon ...