WM8580AGEFTRV WOLFSON [Wolfson Microelectronics plc], WM8580AGEFTRV Datasheet - Page 29

• Manufacturer Part Number: WM8580AGEFTRV
• Description: Multichannel CODEC with S/PDIF Transceiver
• Manufacturer: WOLFSON [Wolfson Microelectronics plc]

Production Data
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Table 16 Audio Interface Control
Notes
1.
REGISTER
ADDRESS
Right Justified mode does not support 32-bit data. If word length xAIFxxWL=11b in Right
Justified mode, the word length is forced to 24 bits.
In all modes, the data is signed 2's complement. The digital filters internal signal paths process
24-bit data. If the device is programmed to receive 16 or 20 bit data, the device pads the unused
LSBs with zeros. If the device is programmed into 32 bit mode, the 8 LSBs are ignored.
PAIF 4
SAIF 2
R13
0Dh
R14
0Eh
BIT
1:0
3:2
1:0
3:2
4
5
4
5
6
PAIFTXFMT
PAIFTXBCP
PAIFTXLRP
PAIFTXWL
SAIFFMT
SAIFBCP
SAIFLRP
SAIF_EN
SAIFWL
LABEL
[1:0]
[1:0]
[1:0]
[1:0]
DEFAULT
10
10
10
10
0
0
0
0
0
PAIF Transmitter Audio Data Format
Select
PAIF Transmitter Audio Data Word
Length
In LJ/RJ/I
In DSP Format:
SAIF Audio Data Format Select
SAIF Audio Data Word Length
In LJ/RJ/I
In DSP Format:
SAIF BCLK polarity
SAIF Enable
PAIF Receiver BCLK polarity
11: DSP Format
10: I
01: Left justified
00: Right justified
11: 32 bits (see Note 1,2)
10: 24 bits
01: 20 bits
00: 16 bits
0 = LRCLK not inverted
1 = LRCLK inverted
0 = DSP Mode A
1 = DSP Mode B
0 = BCLK not inverted
1 = BCLK inverted
11: DSP Format
10: I
01: Left justified
00: Right justified
11: 32 bits (see Note 1,2)
10: 24 bits
01: 20 bits
00: 16 bits
0 = LRCLK not inverted
1 = LRCLK inverted
0 = DSP Mode A
1 = DSP Mode B
0 = BCLK not inverted
1 = BCLK inverted
0 = SAIF disabled
1 = SAIF enabled
2
2
2
2
S Format
S Format
S modes
S modes
DESCRIPTION
PD Rev 4.3 August 2007
WM8580
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