WM8580AGEFTRV WOLFSON [Wolfson Microelectronics plc], WM8580AGEFTRV Datasheet - Page 85
WM8580AGEFTRV
Manufacturer Part Number
WM8580AGEFTRV
Description
Multichannel CODEC with S/PDIF Transceiver
Manufacturer
WOLFSON [Wolfson Microelectronics plc]
Datasheet
1.WM8580AGEFTRV.pdf
(97 pages)
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Production Data
w
REGISTER
SPDTXCHAN 5
SPDMODE
ADDRESS
INTMASK
R35
R36
R37
23h
24h
25h
BIT
3:1
7:4
2:1
8:0
0
0
6
SPDIFIN1MODE
RXINSEL[1:0]
ORGSAMP
WL_MASK
TXWL[2:0]
MASK[8:0]
MAXWL
LABEL
[3:0]
DEFAULT
000000000
0000
101
00
1
1
0
Maximum Audio sample word length
Audio Sample Word Length.
000 = Word Length Not Indicated
TXWL[2:0]
001
010
100
101
110
All other combinations reserved
Original Sampling Frequency. See S/PDIF specification for details.
0000 = original sampling frequency not indicated
Selects the input circuit type for the SPDIFIN1 input
S/PDIF Receiver input mux select. Note that the general purpose
inputs must be configured using GPOxOP to be either CMOS or
comparator inputs if selected by RXINSEL.
S/PDIF Receiver Word Length Truncation Mask
When a flag is masked, it does not update the Error Register or
contribute to the interrupt pulse.
0 = unmask, 1 = mask.
MASK[0] = mask control for UPD_UNLOCK
MASK[1] = mask control for INT_INVALID
MASK[2] = mask control for INT_CSUD
MASK[3] = mask control for INT_TRANS_ERR
MASK[4] = mask control for UPD_AUDIO_N
MASK[5] = mask control for UPD_PCM_N
MASK[6] = mask control for UPD_CPY_N
MASK[7] = mask control for UPD_DEEMPH
MASK[8] = mask control for UPD_REC_FREQ
00 = SPDIFIN1
01 = SPDIFIN2 (MFP3)
10 = SPDIFIN3 (MFP4)
11 = SPDIFIN4 (MFP5)
0 = disabled, data word is truncated as described in Table 60.
1 = enabled, data word is not truncated.
0 = 20 bits
1 = 24 bits
0 = CMOS-compatible input
1 = Comparator input. Compatible with 500mVpp AC coupled
consumer S/PDIF input signals as defined in IEC-60958-3.
DESCRIPTION
MAXWL==1
20 bits
22 bits
23 bits
24 bits
21 bits
PD Rev 4.3 August 2007
MAXWL==
0
16 bits
18 bits
19 bits
20 bits
17 bits
WM8580
85
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