ISPPACCLK5316S-01T48C LATTICE [Lattice Semiconductor], ISPPACCLK5316S-01T48C Datasheet - Page 45

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ISPPACCLK5316S-01T48C

Manufacturer Part Number
ISPPACCLK5316S-01T48C
Description
In-System Programmable, Zero-Delay, Universal Fan-Out Buffer, Single-Ended
Manufacturer
LATTICE [Lattice Semiconductor]
Datasheet
Lattice Semiconductor
Pin Descriptions – ispClock5316S, 5320S (Continued)
GNDD
REFA_REFP
REFB_REFN
REFSEL
VTT_REFA
FBK
VTT_FBK
VTT_REFB
VCCJ
TDO
TDI
TCK
TMS
LOCK
OEX
OEY
PLL_BYPASS
RESET
NC
1. Internal pull-down resistor.
2. Internal pull-up resistor.
3. Must be connected to GNDD if not used.
Pin Name
Digital GND
Clock Reference A/ Positive Differential Input
Clock Reference B/ Negative Differential Input
Clock Reference Select input (LVCMOS)
Termination voltage for reference input A
Feedback input
Termination voltage for feedback input
Termination voltage for reference input B
JTAG Interface VCC
JTAG TDO output
JTAG TDI input
JTAG Clock input
JTAG Mode select
PLL Lock indicator, HIGH indicates PLL Lock
Output enable X
Output enable Y
PLL Bypass
Reset PLL
No internal connection
3
Description
45
3
3
ispClock5300S Family Data Sheet
Pin Type
Output
Output
Power
Power
Power
Power
Input
Input
Input
Input
Input
Input
GND
Input
Input
Input
Input
Input
N/A
2
2
1
1
1
2
ispClock5316S
18, 29, 30, 31,
15, 16, 17, 32,
64 TQFP
33, 34
62
20
21
25
19
23
24
22
55
51
54
53
52
59
57
56
58
26
ispClock5320S
29, 30, 62
64 TQFP
20
21
25
19
23
24
22
55
51
54
53
52
59
57
56
58
26

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