ISPPACCLK5610AV-01T100C LATTICE [Lattice Semiconductor], ISPPACCLK5610AV-01T100C Datasheet - Page 11

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ISPPACCLK5610AV-01T100C

Manufacturer Part Number
ISPPACCLK5610AV-01T100C
Description
In-System Programmable, Enhanced Zero-Delay, Clock Generator with Universal Fan-Out Buffer
Manufacturer
LATTICE [Lattice Semiconductor]
Datasheet
Lattice Semiconductor
Programmable Input and Output Termination Characteristics
R
R
1. Guaranteed by characterization.
IN
OUT
Symbol
Input Resistance
Output Resistance
Parameter
1
Rin=40Ω setting
Rin=45Ω setting
Rin=50Ω setting
Rin=55Ω setting
Rin=60Ω setting
Rin=65Ω setting
Rin=70Ω setting
Rout≈20Ω setting
Rout≈40Ω setting
Rout≈45Ω setting
Rout≈50Ω setting
Rout≈55Ω setting
Rout≈60Ω setting
Rout≈65Ω setting
Rout≈70Ω setting
Conditions
1-11
VCCO=3.3V
VCCO=2.5V
VCCO=1.8V
VCCO=1.5V
VCCO=3.3V
VCCO=2.5V
VCCO=1.8V
VCCO=3.3V
VCCO=2.5V
VCCO=1.8V
VCCO=3.3V
VCCO=2.5V
VCCO=1.8V
VCCO=3.3V
VCCO=2.5V
VCCO=1.8V
VCCO=3.3V
VCCO=2.5V
VCCO=1.8V
VCCO=3.3V
VCCO=2.5V
VCCO=1.8V
VCCO=3.3V
VCCO=2.5V
VCCO=1.8V
V
CCO
Voltage
ispClock5600A Family Data Sheet
-11%
-13%
-10%
-12%
-14%
-13%
-11%
-13%
-14%
-13%
-10%
-12%
Min.
40.5
49.5
-9%
-8%
-9%
-9%
-8%
-9%
-8%
-9%
-9%
36
45
54
59
61
Typ.
15
15
16
14
40
40
41
45
45
48
50
50
54
55
55
59
59
59
63
65
64
69
72
70
74
Max.
49.5
60.5
71.5
11%
13%
10%
12%
14%
13%
11%
13%
14%
13%
10%
12%
9%
8%
9%
9%
8%
9%
8%
9%
9%
44
55
66
77
Units
Ω
Ω

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