ISPPACCLK5610AV-01T100C LATTICE [Lattice Semiconductor], ISPPACCLK5610AV-01T100C Datasheet - Page 47

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ISPPACCLK5610AV-01T100C

Manufacturer Part Number
ISPPACCLK5610AV-01T100C
Description
In-System Programmable, Enhanced Zero-Delay, Clock Generator with Universal Fan-Out Buffer
Manufacturer
LATTICE [Lattice Semiconductor]
Datasheet
Lattice Semiconductor
100-Pin TQFP (Dimensions in Millimeters)
NOTES:
1.
2.
4.
5. THE TOP OF PACKAGE MAY BE SMALLER THAN THE BOTTOM
6.
7.
8.
3.
0.20
DIMENSIONING AND TOLERANCING PER ANSI Y14.5 - 1982.
ALL DIMENSIONS ARE IN MILLIMETERS.
DIMENSIONS D1 AND E1 DO NOT INCLUDE MOLD PROTRUSION.
SECTION B-B:
A1 IS DEFINED AS THE DISTANCE FROM THE SEATING PLANE
DATUMS A, B AND D TO BE DETERMINED AT DATUM PLANE H.
ALLOWABLE MOLD PROTRUSION IS 0.254 MM ON D1 AND E1
DIMENSIONS.
OF THE PACKAGE BY 0.15 MM.
THESE DIMENSIONS APPLY TO THE FLAT SECTION OF THE
LEAD BETWEEN 0.10 AND 0.25 MM FROM THE LEAD TIP.
TO THE LOWEST POINT ON THE PACKAGE BODY.
EXACT SHAPE OF EACH CORNER IS OPTIONAL.
M
c
8
e
C
3
SECTION B-B
A-B
A
PIN 1 INDICATOR
b
TOP VIEW
D
b
b
1
SIDE VIEW
c 1
LEAD FINISH
BASE METAL
D
SEATING PLANE
D
3
4X
B
1-47
3
SEE DETAIL 'A'
0.20
C
0.20
E
0.10 C
C
H
A-B
DETAIL 'A'
A-B
E1
A
D 100X
D
ispClock5600A Family Data Sheet
A2
A1
SYMBOL
A
A1
A2
D
D1
E
E1
L
N
e
b
b1
c
c1
0.20 MIN.
1.00 REF.
H
0.05
1.35
0.45
0.17
0.17
0.09
0.09
MIN.
BOTTOM VIEW
-
D1
16.00 BSC
14.00 BSC
16.00 BSC
14.00 BSC
0.50 BSC
1.40
0.60
NOM.
100
0.15
0.13
0.22
0.20
-
-
GAUGE PLANE
L
0-7∞
MAX.
1.60
0.15
1.45
0.75
0.27
0.23
0.20
0.16
0.25

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