AAT3236IGV-2.8-T1 AAT [Advanced Analog Technology, Inc.], AAT3236IGV-2.8-T1 Datasheet - Page 14

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AAT3236IGV-2.8-T1

Manufacturer Part Number
AAT3236IGV-2.8-T1
Description
300mA CMOS High Performance LDO
Manufacturer
AAT [Advanced Analog Technology, Inc.]
Datasheet

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tion to ground and the LDO regulator ground con-
nection. When the high load current returns through
this path, a small ripple voltage is created, feeding
into the C
Figure 2 shows the preferred method for the
bypass and output capacitor connections. For low
output noise and highest possible power supply
ripple rejection performance, it is critical to connect
the bypass and output capacitor directly to the LDO
regulator ground pin. This method will eliminate
14
DC INPUT
DC INPUT
BYP
GND
GND
V
V
IN
loop.
IN
Figure 1: Common LDO Regulator Layout with C
I
IN
I
IN
C
C
Figure 2: Recommended LDO Regulator Layout.
IN
IN
I
RIPPLE
R
R
I
TRACE
I
RIPPLE
LOAD
TRACE
I
LOAD
V
EN
V
EN
IN
IN
return + noise and ripple
return + noise and ripple
Regulator
Regulator
I
GND
I
GND
LDO
GND
LDO
GND
I
BYP
I
BYP
+ noise
300mA CMOS High Performance LDO
V
BYP
R
only
V
BYP
OUT
R
TRACE
OUT
TRACE
any load noise or ripple current feedback through
the LDO regulator.
Evaluation Board Layout
The AAT3236 evaluation layout (Figures 3, 4, and
5) follows the recommend printed circuit board lay-
out procedures and can be used as an example for
good application layouts.
Note: Board layout shown is not to scale.
I
LOAD
C
LOOP
I
GND
LOAD
BYP
C
BYP
BYP
C
R
R
BYP
TRACE
TRACE
Ripple Feedback Loop.
C
R
C
R
OUT
TRACE
OUT
TRACE
AAT3236
R
R
LOAD
3236.2007.03.1.4
LOAD

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