FSL117MRIN FAIRCHILD [Fairchild Semiconductor], FSL117MRIN Datasheet - Page 3
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FSL117MRIN
Manufacturer Part Number
FSL117MRIN
Description
Manufacturer
FAIRCHILD [Fairchild Semiconductor]
Datasheet
1.FSL117MRIN.pdf
(15 pages)
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© 2012 Fairchild Semiconductor Corporation
FSL117MRN • Rev.1.0.0
Pin Configuration
Pin Definitions
Pin #
1
2
3
4
5
6
7
8
Name
Drain
GND
V
V
FB
V
STR
CC
IN
Ground. This pin is the control ground and the SenseFET source.
Power Supply. This pin is the positive supply input, which provides the internal operating
current for both startup and steady-state operation.
Feedback. This pin is internally connected to the inverting input of the PWM comparator.
The collector of an opto-coupler is typically tied to this pin. For stable operation, a capacitor
should be placed between this pin and GND. If the voltage of this pin reaches 7V, the
overload protection triggers, which shuts down the FPS.
Line Over-Voltage Input. This pin is the input pin of line voltage. The voltage, which is
divided by resistors, is input of this pin. If this pin voltage higher than V
triggers, which shuts down the FPS Do not leave this pin floating. If LOVP is not used, this pin
should be connected directly to the GND.
Startup. This pin is connected directly, or through a resistor, to the high-voltage DC link.
At startup, the internal high-voltage current source supplies internal bias and charges the
external capacitor connected to the V
source (I
SenseFET Drain. High-voltage power SenseFET drain connection.
CH
) is disabled.
Figure 3. Pin Assignments (Top View)
3
CC
pin. Once V
Description
CC
reaches 12V, the internal current
INH
voltage, the LOVP
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