LTM8023EV-PBF LINER [Linear Technology], LTM8023EV-PBF Datasheet - Page 12

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LTM8023EV-PBF

Manufacturer Part Number
LTM8023EV-PBF
Description
2A, 36V DC/DC ?Module
Manufacturer
LINER [Linear Technology]
Datasheet
APPLICATIONS INFORMATION
LTM8023
the peak start-up current can be reduced to the current
that is required to regulate the output, with no overshoot.
Choose the value of the resistor so that it can supply at
least 20μA when the RUN/SS pin reaches 2.5V.
Synchronization
The internal oscillator of the LTM8023 can be synchronized
by applying an external 250kHz to 2MHz clock to the SYNC
pin. Do not leave this pin fl oating . The resistor tied from the
R
oscillates 20% lower than the intended synchronization
frequency (see the Frequency Selection section).
The LTM8023 will not enter Burst Mode operation while
synchronized to an external clock, but will instead skip
pulses to maintain regulation.
Shorted Input Protection
Care needs to be taken in systems where the output will be
held high when the input to the LTM8023 is absent. This
may occur in battery charging applications or in battery
backup systems where a battery or some other supply is
diode OR-ed with the LTM8023’s output. If the V
allowed to fl oat and the SHDN pin is held high (either by a
logic signal or because it is tied to V
internal circuitry will pull its quiescent current through
its internal power switch. This is fi ne if your system can
tolerate a few milliamps in this state. If you ground the
SHDN pin, the SW pin current will drop to essentially zero.
However, if the V
held high, then parasitic diodes inside the LTM8023 can
pull large currents from the output through the V
Figure 4 shows a circuit that will run only when the input
voltage is present and that protects against a shorted or
reversed input.
PCB Layout
Most of the headaches associated with PCB layout have
been alleviated or even eliminated by the high level of
integration of the LTM8023. The LTM8023 is neverthe-
less a switching power supply, and care must be taken to
minimize EMI and ensure proper operation. Even with the
12
T
pin to ground should be chosen such that the LTM8023
IN
pin is grounded while the output is
IN
), then the LTM8023’s
IN
IN
pin is
pin.
high level of integration, you may fail to achieve specifi ed
operation with a haphazard or poor layout. See Figure 5
for a suggested layout.
Ensure that the grounding and heatsinking are acceptable.
A few rules to keep in mind are:
1. Place the R
2. Place the C
3. Place the C
Figure 4. The Input Diode Prevents a Shorted Input from
Discharging a Backup Battery Tied to the Output. It Also Protects
the Circuit from a Reversed Input. The LTM8023 Runs Only When
the Input is Present.
Figure 5. Layout Showing Suggested External Components, GND
Plane and Thermal Vias
V
their respective pins.
and GND connection of the LTM8023.
V
IN
OUT
GND
and GND connection of the LTM8023.
V
OUT
ADJ
IN
OUT
capacitor as close as possible to the V
and R
capacitor as close as possible to the
C
OUT
V
RUN/SS
T
R
IN
T
resistors as close as possible to
SYNC
LTM8023
SHARE
GND
AUX
C
R
IN
T
BIAS
V
BIAS
AUX
8023 F04
ADJ
OUT
R
V
ADJ
IN
SYNC
PGOOD
RUN/SS
8023 F05
V
OUT
8023fb
IN

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