LTM8047 LINER [Linear Technology], LTM8047 Datasheet - Page 14

• Manufacturer Part Number: LTM8047
• Description: 3.1VIN to 32VIN Isolated ?Module DC/DC Converter
• Manufacturer: LINER [Linear Technology]

LTM8048
APPLICATIONS INFORMATION
A few rules to keep in mind are:
1. Place the R
2. Place the C
3. Place the C
4. Place the C
5. Connect all of the GND connections to as large a copper
6. Use vias to connect the GND copper area to the board’s
Hot-Plugging Safely
The small size, robustness and low impedance of ceramic
capacitors make them an attractive option for the input
bypass capacitor of the LTM8048. However, these capaci-
tors can cause problems if the LTM8048 is plugged into a
live supply (see Linear Technology Application Note 88 for
a complete discussion). The low loss ceramic capacitor
combined with stray inductance in series with the power
source forms an underdamped tank circuit, and the volt-
age at the V
twice the nominal input voltage, possibly exceeding the
LTM8048’s rating and damaging the part. A similar phe-
nomenon can occur inside the LTM8048 module, at the
14
to their respective pins.
and GND connections of the LTM8048.
and V
as possible to V
ground current flow directly adjacent or underneath
the LTM8048.
pour or plane area as possible on the top layer. Avoid
breaking the ground connection between the external
components and the LTM8048.
internal ground planes. Liberally distribute these GND
vias to provide both a good ground connection and
thermal path to the internal planes of the printed circuit
board. Pay attention to the location and density of the
thermal vias in Figure 1. The LTM8048 can benefit from
the heat sinking afforded by vias that connect to internal
GND planes at these locations, due to their proximity
to internal power handling components. The optimum
number of thermal vias depends upon the printed
circuit board design. For example, a board might use
very small via holes. It should employ more thermal
vias than a board that uses larger holes.
OUT
–
IN
. Likewise, place the C
ADJ1
OUT1
IN
pin of the LTM8048 can ring to more than
IN
capacitor as close as possible to the V
and R
and C
capacitor as close as possible to V
OUT2
ADJ2
and V
OUT
resistors as close as possible
capacitors such that their
OUT
–
OUT2
.
capacitor as close
OUT1
IN
output of the integrated EMI filter, with the same potential
of damaging the part. If the input supply is poorly con-
trolled or the user will be plugging the LTM8048 into an
energized supply, the input network should be designed
to prevent this overshoot. This can be accomplished by
installing a small resistor in series to V
popular method of controlling input voltage overshoot is
adding an electrolytic bulk capacitor to the V
This capacitor’s relatively high equivalent series resistance
damps the circuit and eliminates the voltage overshoot.
The extra capacitor improves low frequency ripple filter-
ing and can slightly improve the efficiency of the circuit,
though it can be a large component in the circuit.
Thermal Considerations
The LTM8048 output current may need to be derated if it
is required to operate in a high ambient temperature. The
amount of current derating is dependent upon the input
voltage, output power and ambient temperature. The
temperature rise curves given in the Typical Performance
Characteristics section can be used as a guide. These curves
were generated by the LTM8048 mounted to a 58cm
4-layer FR4 printed circuit board. Boards of other sizes
and layer count can exhibit different thermal behavior, so
it is incumbent upon the user to verify proper operation
over the intended system’s line, load and environmental
operating conditions.
For increased accuracy and fidelity to the actual application,
many designers use FEA to predict thermal performance.
To that end, the Pin Configuration section of the data sheet
typically gives four thermal coefficients:
While the meaning of each of these coefficients may seem
to be intuitive, JEDEC has defined each to avoid confu-
sion and inconsistency. These definitions are given in
JESD 51-12, and are quoted or paraphrased as follows:
θ
θ
tom of the product case
θ
product case
θ
circuit board.
JA
JCbottom
JCtop
JCboard
: Thermal resistance from junction to ambient
: Thermal resistance from junction to top of the
: Thermal resistance from junction to the printed
: Thermal resistance from junction to the bot-
IN
, but the most
IN
or f
IN
8048fa
net.
2