HT82B40A HOLTEK [Holtek Semiconductor Inc], HT82B40A Datasheet - Page 28

• Manufacturer Part Number: HT82B40A
• Description: I/O MCU with USB Interface
• Manufacturer: HOLTEK [Holtek Semiconductor Inc]

No matter what the source of the wake-up event is, once
a wake-up situation occurs, a time period equal to 1024
system clock periods will be required before normal sys-
tem operation resumes. However, if the wake-up has
originated due to an interrupt, the actual interrupt sub-
routine execution will be delayed by an additional one or
more cycles. If the wake-up results in the execution of
the next instruction following the HALT instruction, this
will be executed immediately after the 1024 system
clock period delay has ended.
Watchdog Timer
The WDT clock source is implemented by a dedicated
RC oscillator (WDT oscillator) or instruction clock (sys-
tem clock divided by 4), enabled using a configuration
option. This timer is designed to prevent a software mal-
function or sequence jumping to an unknown location
with unpredictable results. If the Watchdog Timer is dis-
abled, all the executions related to the WDT results in no
operation.
Rev. 1.10
Bit No.
4~6
0
1
2
3
7
WDTS0
WDTS1
WDTS2
WDTS3
WDTS7
Label
Watchdog Timer division ratio selection bits
Bit 2,1,0 = 000, division ratio = 1:1
Bit 2,1,0 = 001, division ratio = 1:2
Bit 2,1,0 = 010, division ratio = 1:4
Bit 2,1,0 = 011, division ratio = 1:8
Bit 2,1,0 = 100, division ratio = 1:16
Bit 2,1,0 = 101, division ratio = 1:32
Bit 2,1,0 = 110, division ratio = 1:64
Bit 2,1,0 = 111, division ratio = 1:128
Bit3=1, D+, and D- connected to 510k pull-high resistor
Bit3=0, No pull-high - default at MCU reset
Not used
Bit7=1, USB reset signal can reset MCU and set URST_FLAG (bit 2 of 1AH) (default on
at MCU reset)
Bit7=0, USB reset signal cannot reset MCU
Watchdog Timer
WDTS Register
28
Once the internal WDT oscillator (RC oscillator normally
with a period of 78 s) is selected, it is first divided by 256
(8-stages) to get the nominal time-out period of approxi-
mately 20ms. This time-out period may vary with tem-
perature, VDD and process variations. By using the
WDT prescaler, longer time-out periods can be realized.
Writing data to WS2, WS1, WS0 (bit 2, 1, 0 of the
WDTS) can give different time-out periods. If WDTS2,
WDTS1, WDTS0 are all equal to 1 , the division ratio is
up to 1:128, and the maximum time-out period is 2.6s.
If the WDT oscillator is disabled, the WDT clock source
may still come from the instruction clock and operate in
the same manner except that in the Power down Mode
state the WDT may stop counting and lose its protecting
purpose. In this situation the WDT logic can be restarted
by external logic. The high nibble and bit 3 of the WDTS
are reserved for user defined flags, which can be used
to indicate some specified status.
If the device operates in a noisy environment, using the
on-chip RC oscillator (WDT OSC) is strongly recom-
mended, since the HALT will stop the system clock.
Function
HT82B40R/HT82B40A
September 4, 2009