GAL18V10-15LP LATTICE [Lattice Semiconductor], GAL18V10-15LP Datasheet - Page 9

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GAL18V10-15LP

Manufacturer Part Number
GAL18V10-15LP
Description
High Performance E2CMOS PLD Generic Array Logic
Manufacturer
LATTICE [Lattice Semiconductor]
Datasheet

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1) Refer to Switching Test Conditions section.
2) Calculated from fmax with internal feedback. Refer to fmax Description section.
3) Refer to fmax Description section.
*Characterized but not 100% tested.
PARAMETER
AC Switching Characteristics
Capacitance (T
SYMBOL
f
t
t
max
t
t
t
t
t
t
t
t
t
t
arw
t
spr
wh
dis
arr
pd
co
cf
su
en
wl
ar
h
C
C
2
I/O
I
3
COND.
TEST
A
A
A
A
A
B
C
A
1
A
= 25 C, f = 1.0 MHz)
Input or I/O to Combinatorial Output
Clock to Output Delay
Clock to Feedback Delay
Setup Time, Input or Feedback before Clock
Hold Time, Input or Feedback after Clock
Maximum Clock Frequency with
External Feedback, 1/(tsu +tco)
Maximum Clock Frequency with
Internal Feedback, 1/(tsu + tcf)
Maximum Clock Frequency with
No Feedback
Clock Pulse Duration, High
Clock Pulse Duration, Low
Input or I/O to Output Enabled
Input or I/O to Output Disabled
Input or I/O to Asynchronous Reset of Register
Asynchronous Reset Pulse Duration
Asynchronous Reset to Clock Recovery Time
Synchronous Preset to Clock Recovery Time
DESCRIPTION
Input Capacitance
I/O Capacitance
PARAMETER
Over Recommended Operating Conditions
MAXIMUM*
10
8
9
Specifications GAL18V10
UNITS
pF
pF
58.8
62.5
MIN. MAX.
10
50
10
15
10
0
8
8
COM
-15
V
15
10
15
15
20
TEST CONDITIONS
V
7
CC
CC
= 5.0V, V
= 5.0V, V
41.6
45.4
62.5
MIN. MAX.
12
15
15
12
0
8
8
COM
-20
I/O
I
= 2.0V
= 2.0V
20
12
10
20
20
20
UNITS
MHz
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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