HN58X2402-SR HITACHI [Hitachi Semiconductor], HN58X2402-SR Datasheet - Page 9

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HN58X2402-SR

Manufacturer Part Number
HN58X2402-SR
Description
Two-wire serial interface 2k / 4k / 8k / 16k / 32k / 64k EEPROM
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet
Pin Connections for A0 to A2
Memory size
2k bit
4k bit
8k bit
16k bit
32k bit
64k bit
Notes: 1. “V
Write Protect (WP)
the following table. When the WP is low, write operation for all memory arrays are allowed. The read
operation is always activated irrespective of the WP pin status. WP should be fixed high or low during
operations since WP does not provide a latch function.
Write Protect Area
WP pin status 2k bit
V
V
When the Write Protect pin (WP) is high, the write protection feature is enabled and operates as shown in
IH
IL
2.
= Don’t care (Open is also approval.)
CC
HN58X2402/58X2404/58X2408/58X2416/58X2432/58X2464-SR
Max connect
number
8
4
2
1
8
8
Write protect area
Upper 1/2
(1k bit)
Normal read/write operation
/V
SS
” means that device address pin should be connected to V
Pin connection
A2
V
V
V
V
V
4k bit
Upper 1/2
(2k bit)
CC
CC
CC
CC
CC
/V
/V
/V
/V
/V
SS
SS
SS
SS
SS
*
1
A1
V
V
V
V
CC
CC
CC
CC
/V
/V
/V
/V
SS
SS
SS
SS
8k bit
Upper 1/2
(4k bit)
A0
V
V
V
*
CC
CC
CC
2
/V
/V
/V
SS
SS
SS
Notes
Use A0 for memory address a8
Use A0, A1 for memory address a8 and a9
Use A0, A1, A2 for memory address a8, a9 and
a10
16k bit
Upper 1/2
(8k bit)
CC
32k bit
Upper 1/4
(8k bit)
or V
SS
.
64k bit
Upper 1/4
(16k bit)
9

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