SAB80C515A-M18-T3 Siemens Semiconductor Group, SAB80C515A-M18-T3 Datasheet - Page 18

• Manufacturer Part Number: SAB80C515A-M18-T3
• Description: 8-Bit CMOS Single-Chip Microcontroller
• Manufacturer: Siemens Semiconductor Group

Control of XRAM in the SAB 80C515A
There are two control bits in register SYSCON which control the use and the bus operation
during accesses to the additional On-Chip RAM (XRAM).
Special Function Register SYSCON
Addr. 0B1
Bit
XMAP0
XMAP1
Reset value of SYSCON is XXXX XX01B.
The control bit XMAP0 is a global enable/disable bit for the additional On-Chip RAM (XRAM).
If this bit is set, the XRAM is disabled, all MOVX accesses use external memory via the external
bus. In this case the SAB 80C515A does not use the additional On-Chip RAM and is compatible
with the types without XRAM.
Semiconductor Group
H
Function
Global enable/disable bit for XRAM memory.
XMAP0 =0: The access to XRAM (= On-Chip XDATA memory) is en-
XMAP0 = 1: The access to XRAM is disabled. All MOVX accesses are
Control bit for / RD/WRsignals during accesses to XRAM; this bit has no
effect if XRAM is disabled (XMAP0 = 1) or if addresses exceeding the
XRAM address range are used for MOVX accesses.
XMAP1 = 0: The signals RD and WR are not activated during accesses
XMAP1 = 1: The signals RD and WR are activated during accesses to
abled.
performed by the external bus (reset state).
to XRAM.
XRAM.
17
SAB 80C515A/83C515A-5
XMAP1 XMAP0 SYSCON