M66256 Mitsubishi, M66256 Datasheet - Page 9
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M66256
Manufacturer Part Number
M66256
Description
5120 x 8-BIT LINE MEMORY (FIFO)
Manufacturer
Mitsubishi
Datasheet
1.M66256.pdf
(11 pages)
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Manufacturer:
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• N-bit delay 2
• N-bit delay 3 __
(Sliding WRES and RRES at a cycle corresponding to delay length)
(Disabling RE at a cycle corresponding to delay length)
WCK
RCK
D
WCK
RCK
WRES
RRES
RE
Q
D
Q
WRES
RRES
n
n
n
n
_____
t
t
RESS
RESS
t
t
RESH
RESH
Cycle 0
Cycle 0
HIGH-Z
_____
t
t
DS
DS
(0)
(0)
t
t
DH
DH
Cycle 1
Cycle 1
(1)
(1)
Cycle 2
Cycle 2
m cycles
m cycles
(2)
(2)
Cycle n–2
(n–2)
(n–2)
t
NREH
Cycle n–1
Cycle n–1
t
RESS
t
RES
(n–1)
(n–1)
t
RESH
Cycle n
Cycle n
t
t
AC
AC
t
DS
(n)
(0)
(n)
(0)
t
t
t
OH
OH
DH
Cycle n+1 Cycle n+2 Cycle n+3
Cycle n+1 Cycle n+2 Cycle n+3
t
DS
(n+1)
(n+1)
(1)
(1)
t
DH
5120
MITSUBISHI DIGITAL ASSP
(n+2)
(n+2)
(2)
(2)
8-BIT LINE MEMORY (FIFO)
(n+3)
(n+3)
(3)
(3)
WE, RE = "L"
m
WE = “L”
m
M66256FP
3
3
9