HIP9022AM Intersil Corporation, HIP9022AM Datasheet - Page 3

• Manufacturer Part Number: HIP9022AM
• Description: Dual High Speed Laser Driver
• Manufacturer: Intersil Corporation

Pin Descriptions
NUMBER
3, 4, 5
PIN
1, 2
6, 7
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
8
9
ESD SHUNT DRAIN-1 Laser diode ESD protection.
ESD LASER GND
SD LASER PS-1
LASERON1B
CTC1-10K
CTC1-27K
TECGDR1
TECREF1
SYMBOL
RESETB
DIAGINB
TECFB1
XTEN1+
XTEN1-
INVERT
VLOW1
GNDA1
GNDD1
TRES1
NULLB
VUP1
SG_1
SB_H
OC1
V
CC1
OT1
V
V
V
NC
NC
NC
A3
DD
CC
EE
IN
4-3
Laser supply and system ground.
Laser power supply ESD protection.
Input for 12V power supply.
No connection.
Filter capacitor for internally generated shunt gate upper voltage level (1 F).
Drive output to shunt Power FET gate.
Filter capacitor for internally generated shunt Power FET gate lower drive voltage level (1 F).
Input for -5V power supply.
Analog Ground.
Digital Ground.
Gate drive to the current source Power FET.
Times 10 constant current monitor amplifier input from the high side of the sense resistor.
Times 10 constant current monitor amplifier input from the low side of the sense resistor.
Thermal compensation short time constant where T
0.02 F).
Thermal compensation long time constant where T
0.1 F).
Input control turns shunt Power FET gate drive ON/OFF with 5V CMOS logic. Low turns the shunt Power
FET OFF and the Laser ON. These pins have an internal pull-up.
Laser over-current indicator flag.
Feedback to stabilize the TEC loop.
Feedback to stabilize the TEC loop.
Thermo-Electric Cooler Power FET gate drive.
Thermo-Resistor output to ground connection for TEC control.
Laser out of temperature range indication.
No connection.
High input converts to operation with Pmos Current source and NDmos shunt Power FET external
transistors. Low input converts to operation with NDmos Current source and Pmos high side shunt Power
FET external transistors. This pin has an internal pull-down.
When RESETB is held low, three reset actions occur. The LASERONB input is defeated to a Laser Off con-
dition. The SG_1, 2 outputs are switched to VLOW when in the INVERT low mode and to VUP when in the
INVERT high mode. The TEC amplifier is turned off to switch the TECGDR1, 2 outputs to Ground. This pin
has an internal pull-down.
Low level activates the diagnostic mode. This pin has an internal pull-up.
Auto-zeros the S/H amplifier selected by address when held low. This pin has an internal pull-up.
Samples the selected address when held low. The setup time for address is <25ns. This pin has an internal
pull-up.
No connection.
Analog voltage sampled by selected S/H. The input voltage range is 0 to 5V. There is an internal voltage
clamp for voltage outside of this range. There is an internal 2 - 3 s filter for noise rejection.
Input for 5V power supply.
Refer to the Table 1 Address Map. The A3 - A0 pins have an internal pull-up.
HIP9022
DESCRIPTION
TC
TC
= External C x 27k . (External C typically equal
= External C x 10k . (External C typically equal