CS7410-CM Cirrus Logic, CS7410-CM Datasheet
CS7410-CM
Related parts for CS7410-CM
CS7410-CM Summary of contents
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... DRAM or SRAM for Elec- tronic Shock Protection (ESP). A flexible set of interfaces are available for end-user I/O such as a keypad and LCD control for use in mass market CD players, boom boxes, and shelf-top systems. ORDERING INFORMATION CS7410-CM CS7410-CQ RISC-32 DSP-16 Data Instruction ...
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... SDRAM Interface .................................................................................. 7 1.1.4.2 Serial Interface .................................................................................... 11 1.1.4.3 EDO DRAM interface .......................................................................... 12 1.1.4.4 FLASH / ROM Interface ...................................................................... 15 1.1.4.5 Audio Output Interface ........................................................................ 17 1.1.4.6 CD Interface ........................................................................................ 18 1.1.4.7 Miscellaneous Timings ........................................................................ 20 2. CS7410 SUMMARY ................................................................................................................ 21 2.1 CS7410 Typical Application ............................................................................................. 21 2.2 CS7410 Block Summaries .............................................................................................. 21 2.2.1 RISC-32 .............................................................................................................. 21 2.2.2 DSP-16 ................................................................................................................ 21 2.2.3 System Controls .................................................................................................. 21 2.2.4 Memory System .................................................................................................. 22 2.2.5 CD Interface ........................................................................................................ 22 2.2.6 Audio Interface .................................................................................................... 22 2.2.7 External Interface ................................................................................................ 22 2.2.8 System Functions ................................................................................................ 22 3. FUNCTIONAL DESCRIPTION ............................................................................................... 23 3 ...
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... Figure 11. FLASH/ROM Write....................................................................................................... 16 Figure 12. Audio Output Timing .................................................................................................... 17 Figure 13. CD Interface Timing ..................................................................................................... 18 Figure 14. CD Interface Timing Diagrams..................................................................................... 19 Figure 15. Miscellaneous Timings................................................................................................. 20 Figure 16. CS7410 Application ..................................................................................................... 21 Figure 17. CS7410 Pin Identification............................................................................................. 25 Figure 18. 100-Pin MQFP Package (20x14x2.85mm) .................................................................. 38 Figure 19. 100-Pin LQFP Package (14X14X1.4mm) .................................................................... 39 LIST OF TABLES Table 1. SDRAM Characterization Data ......................................................................................... 7 Table 2 ...
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... Table 16. Dedicated General Purpose I/O Pins ............................................................................ 35 Table 17. Redefined General Purpose Pins.................................................................................. 35 Table 18. Power and Ground ........................................................................................................ 36 4 CS7410 DS553PP1 ...
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... Ambient Temperature (power applied) AMB P Power consumption TOT CAUTION: Operating beyond these Minimum and Maximum limits can result in permanent damage to the device. Cirrus Logic recommends that CS7410 devices operate at the settings described in the next ta- ble. 1.1.2 RECOMMENDED OPERATING CONDITIONS Parameter Supply Voltage, IO ...
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... Output Voltage, High Output Voltage, Low High-Z-state Leakage 6 Symbol Conditions buffer rating buffer rating OUT SS DD CS7410 Min Typ Max Units 2.0 Volts 0.8 Volts - 2.4 Volts 0.4 Volts - DS553PP1 ...
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... M_D[15:0] hold time after DR_CKO mhr DR_CKO M_WE_L M_A DR_RAS_L DR_CAS_L M_D (write) t msur M_D (read) DS553PP1 Description Min Table 1. SDRAM Characterization Data t mper t mco t mdow t mhr Figure 1. SDRAM Timing CS7410 Typ Max Unit mhw 7 ...
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... DR_CKO DR_RAS_L DR_CAS_L M_A M_D M_WE_L 8 Figure 2. SDRAM Load Mode CS7410 DS553PP1 ...
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... DR_CKO DR_RAS_L DR_CAS_L ADRAS M_A M_D M_WE_L DR_CKO DR_RAS_L DR_CAS_L ADRAS M_A M_D M_WE_L DS553PP1 ADCAS D0 D1 ... Figure 3. SDRAM Burst Write ADCAS D1 D2 Figure 4. SDRAM Burst Read CS7410 Dn ... Dn 9 ...
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... DR_CKO DR_RAS_L DR_CAS_L M_A M_D M_WE_L 10 Figure 5. SDRAM Refresh CS7410 DS553PP1 ...
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... CMs SER2_CLK (CPOL=1) t DMs SER2_DO MSB (master) t DSs SER2_DI MSB (slave) SER2_CS DS553PP1 Description Table 2. Serial Interface Characterization Data t clk_per t DMh t DSh Figure 6. Serial Interface Timing Diagram CS7410 Min Typ Max Unit LSB LSB 11 ...
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... Note:Values shown are for minimum internal clock period (11ns) and all programmed wait states enabled. 12 Description Table 3. EDO DRAM Characterization Data CS7410 Min Typ Max Unit ...
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... CPN t t RAH ASC ADCAS t WDS DATA t RAS t RCL t CAS t CPN t t RAH ASC ADCAS t AA DATA Figure 8. EDO Page Read Timing Diagram CS7410 CRH t CAH ADCAS t WDH DATA OER CRH t CAH ADCAS t t CAC DCH DATA ...
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... DR_RAS_L t CSR DR_CAS_L 14 t RAS t CHR Figure 9. EDO Refresh Timing Diagram CS7410 DS553PP1 ...
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... Note:Values shown are for minimum internal clock period (11ns) and no programmed wait states. NVM_CE_L M_WE_L M_AP_OE M_A M_D DS553PP1 Description 1 Table 4. FLASH/ROM Read Characterization Data t CSpw t RDd1 t ADs t DAS Figure 10. FLASH/ROM Read CS7410 Min Typ Max Unit 135 - ...
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... NVM_CE_L M_A M_D t M_WE_L WRSU M_AP_OE 16 t WRPW Figure 11. FLASH/ROM Write CS7410 t WRH DS553PP1 ...
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... Active clock edge is programmable. Timing is referenced from the active edge. PCM_XCK(Input/Output) PCM_BCK(Output) PCM_BCK(Output) PCM_LRCK(Output) PCM_DO[1:0] (Output) DS553PP1 Description lrds t adsm Figure 12. Audio Output Timing CS7410 Min Typ Max 440 axper t axcl axch sdmi sdmo ...
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... CD_DATA and CD_C2P0 setup to CD_BCK active edge sdi t CD_DATA and CD_C2P0 hold time after CD_BCK active edge hsdi Note:Active edge of CD_BCLK is programmable CD_BCK(Input)* CD_LRCK(Input) CD_DO (Input) CD_C2PO (Input) 18 Description t slri t sdi Figure 13. CD Interface Timing CS7410 Min Typ Max Units hsdi DS553PP1 ...
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... MSB 1 0 Invalid Right Channel Left Channel LSB MSB Upper (Right Channel) Lower (Left Channel) Upper (Left Channel) CS7410 LSB 1 0 LSB LSB MSB ...
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... RST_N Low Pulse Width t rstl t GPIO PW High gph GPIO PW Low t gpl 1. Value represents typical application with 16.934 MHz crystal XTLCLOCK RESET-N 20 Description t t gph GPIO Figure 15. Miscellaneous Timings CS7410 Min Typ Max 59.05 1000 xccper rst Unit ...
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... CS7410 SUMMARY 2.1 CS7410 Typical Application Figure 16 shows an example of a complete audio player using the CS7410. ROM/FLASH (optional) 0-2 MB For new code 2.2 CS7410 Block Summaries 2.2.1 RISC-32 • Powerful 32-bit RISC processor • Comprehensive development tool support • Big or little endian data formats supported • ...
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... Includes clock divider and clock shutoff cir- cuits for low power/sleep modes 2 S connectivity at • Advanced 0.18 micron CMOS technology, runs off 1.8 V and 3.3 V • All I/O pins are 3.3 V, with 5 V tolerance • 100-pin MQFP package • 100-pin LQFP package CS7410 ) stereo audio mod- External Interface System Functions DS553PP1 ...
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... Memory Control The Memory Controller performs the arbitration functions for all the other modules in the CS7410, allowing access to internal ROM and SRAM, and to external ROM and DRAM. The Memory Con- troller services and arbitrates a number of clients and stores their code and/or data within the local DS553PP1 memory ...
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... The modulator has a 32x upsam- pling filter, followed by a 32x interpolator, and fi- th nally a 5 -order Sigma-Delta modulator. auto-mute circuit also works on the modulator out- put, and there are separate programmable attenua- tors for the modulator output and both PCM outputs. CS7410 The DS553PP1 ...
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... PIN DESCRIPTION 4.1 Pin Identification Figure 17 shows the CS7410 pins grouped by function, also showing the number of pins in each group. Table 6 lists the conventions used to identify the pin type and direction.pin assignments. I: Input S: Schmitt trigger on input U: Pull up resistor O: Output O4: Output – 4mA drive T4: High Z output – ...
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... Table 6. Pin Type and Direction Legend (Continued) Table 7 lists the pin number, pin name, and pin type for the 100-pin CS7410 package. For signal pins, the pin direction after reset is shown. The primary function and pin direction is shown for all signal pins. For some signal pins, a secondary function and direction are also shown ...
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... DRAM Address[8] DRAM Address[7] DRAM Address[6] DRAM Address[5] DRAM Address[4] DRAM Address[3] DRAM Address[2] DRAM Address[1] DRAM Address[0] DRAM RAS_L Core Power DRAM CAS_L Table 7. Pin Assignments (Continued) CS7410 Dir Function #2 Dir Note I B NVMem Data[ NVMem Data[ NVMem Data[2] ...
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... GPIO[25] I GPIO[26] I GPIO[27] I GPIO[28] I GPIO[4] I Debug Port Clock I Debug Port Data I GPIO[5] I GPIO[6] I/O Ground I Serial2 Clock I Serial2 Data In I Serial2 Data Out Table 7. Pin Assignments (Continued) CS7410 Dir Function #2 Dir Note O NVM_WE_L NVMem 1 Address[20] O NVM_ OE_L ...
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... DAC Left Positive Out DAC Left Negative Out I/O Ground DAC Right Positive Out DAC I/O Power DAC Right Negative Out Reset_L Manufacturing Test PCM_BCK PCM_LRCK PCM_Dout[0] PCM_Dout[1] IEC-958 Out GPIO[0] Table 7. Pin Assignments (Continued) CS7410 Dir Function #2 Dir Note B GPIO[10 GPIO[11 GPIO[12 ...
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... The main system clock can be derived from an external crystal connected between the XTLCLK_I and XTLCLK_O pins, or can be received from the CD servo chip via the XTLCLK_I pin. The CS7410 can accommodate a variety of input frequencies, such as 44.1 KHz x 256, x 384 512. Pin ...
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... SER3_SS1 4.4 SDRAM / DRAM Interface These pins are used to interface the CS7410 with external synchronous or EDO DRAMs. Data widths bits are supported. The CS7410 supports word or block transfers (partial word transfers are not re- quired). Table 10 gives instructions on how to interface to any particular configuration of SDRAM. ...
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... Memory Address Bus[19..12] (shared with bits [15..8] of DRAM data bus). O Memory Address Bus[20] (DRAM BS_L pin). O NVRAM Write Enable (shared with DRAM WE_L pin) O NVRAM Write Enable (shared with DRAM WE_L pin) O ROM/NVRAM Chip Enable. Table 12. ROM/NVRAM Interface CS7410 Description Description DS553PP1 ...
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... PCM DAC. The sample rate and the size of the samples are programmable to accommo- date any commercially available DAC. The CS7410 has two data output pins, for channels of PCM output, and a separate output pin to simultaneously output IEC-958 encoded data (either compressed or uncompressed) ...
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... Pin Signal Name 81 CD_BCLK 82 CD_LRCK 83 CD_DATA 80 CD_C2P0 34 Table 15. This interface is used to read serial CD data from a CD Type I CD clock input – polarity is programmable I CD left-right clock input I CD serial data input I CD error signaling input Table 15. CD Interface CS7410 Description DS553PP1 ...
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... General Purpose Input/Output (GPIO) The CS7410 provides a number of General Purpose Input/Output (GPIO) pins, each with individual output three-state controls, and a number of General Purpose Output (GPO) pins. ed GPIO pins. A naming scheme for these pins was chosen to encourage system designers to adhere to standardized pin usage. ...
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... Power and Ground Table 18 describes the power and ground pins. The CS7410 requires 3 different types of power supplies for the PLLs, internal logic, and IO pins. The PLLs and internal logic use 1.8 V supply voltage. The IO pins use 3.3 V supply voltage. An optional separate supply can be used to provide clean 3 the Sigma-Delta DACs digital output pads ...
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... DS553PP1 CS7410 37 ...
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... MQFP PACKAGE SPECIFICATIONS (20X14X2.85mm) 81 100 0.310 0.050 Note: Measurement Units = mm 38 23.200 0.250 20.000 0.100 0.650 0.150 DETAIL A Figure 18. 100-Pin MQFP Package (20x14x2.85mm 0~8 0.800 0.150 1.600 0.150 CS7410 DS553PP1 ...
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... LQFP PACKAGE SPECIFICATIONS (14X14X1.4mm) DS553PP1 Figure 19. 100-Pin LQFP Package (14X14X1.4mm) CS7410 39 ...