PXB4220 Infineon Technologies AG, PXB4220 Datasheet

PXB4220

Manufacturer Part Number

PXB4220

Description

members of Infineon ATM Chipset

Manufacturer

Infineon Technologies AG

Datasheet

1.PXB4220.pdf (2 pages)

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The "Interworking Element for 8 E1/T1 lines"

(IWE8), PXB 4220 and PXB 4221 are members of

Infineon" ATM Chipset. Together with framing and

line interface components (e.g. Infineon's

QuadFALC PEB 22554) the IWE8 serves as gate-

way between Asynchronous Transfer Mode (ATM)

networks and timeslot based PDH networks.

The IWE8 is a single chip multiservice device that

integrates ATM cell handling and TDM circuit to

ATM cell interworking in E1/T1 applications. Each

of the 8 E1 or T1 input and output ports can be

configured independently to operate in ATM Mode

or AAL Mode. It is a very flexible solution support-

ing multiple services with a minimum of devices.

I W E 8

P X B 4 2 2 0 / 4 2 2 1

Features

Full duplex ATM Packetizer/

Depacketizer for 8 E1/T1

highways

Configurable to T1 or E1 mode

via external pin

8 T1/E1 ports configurable inde-

pendently to ATM or AAL Mode

ATM Mode:

- ATM cell mapping into PDH

- B-ISDN User-Network

- Physical Layer Opera-

AAL Mode (PXB 4220/4221):

- AAL1 according to

according to ITU-T G.804

Interface

tion at 1544 kbit/s and

2048 kbit/s according to

ITU-T I.432.3

ITU-T I.363.1 or transparent

without any adaptation layer

overhead (AAL0)

- Structured T1/E1 N x 64 kbit/s

- Channel Associated Signalling

- Partially filled cells with pro-

- Reassembly buffer can com-

- Statistics counters per chan-

- Internal clock recovery circuit

(CAS)

service

grammable filling thresholds

pensate up to +/- 4 ms Cell

Delay Variation (CDV)

nel for lost/misinserted/errored

cells etc.

using Synchronous Residual

Time Stamp (SRTS) or Adap-

tive Clock Method (ACM) for

unstructured CES ports.

Optionally, it's possible to

order the PXB 4221 device,

which comes without SRTS

clock recovery.

N e v e r

s t o p

R O D U C T

t h i n k i n g .

Inverse Multiplexing over ATM

(IMA) interface

8 generic framer interfaces with

integrated transmit clock selec-

tor supporting

- Synchronous Mode (SYM)

- Generic Interface Mode (GIM)

- FALC Mode (FAM): Glue-less

- Echo Canceller Mode (EC):

UTOPIA industry standard

interface:

- Level 2 in slave mode; 8 data,

- Level 1 in master/slave mode

- UTOPIA clock up to 38.88 MHz

interface for Infineon's Framer

and Line Interface Compo-

nents (FALC)

ATM cells are duplicated

internally and transmitted via

two framer ports

5 address lines

IWE8

R I E F

Related parts for PXB4220

PXB4220 Summary of contents

Page 1

The "Interworking Element for 8 E1/T1 lines" (IWE8), PXB 4220 and PXB 4221 are members of Infineon" ATM Chipset. Together with framing and line interface components (e.g. Infineon's QuadFALC PEB 22554) the IWE8 serves as gate- way between Asynchronous Transfer ...

Page 2

... Microcontroller How to reach us: http://www.infineon.com Published by Infineon Technologies AG, Bereich Kommunikation, St.-Martin-Strasse 53, D-81541 München © Infineon Technologies AG 2000. All Rights Reserved. Published by Infineon Technologies Cell insertion/extraction via microprocessor interface 3.3 V power supply with 5 V tolerant inputs Typical power dissipation 1 W ...

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