PXB4220E Infineon Technologies AG, PXB4220E Datasheet - Page 125

• Manufacturer Part Number: PXB4220E
• Description: Interworking Element for 8 E1/T1 Lines
• Manufacturer: Infineon Technologies AG

band_width
sdt
channel_
mode
ref_slot
1)
2)
Note: To allow IWE8 internal initialization, all channels must remain in inactive mode for
Note: If frame based SDT without CAS is used and filling level
Data Sheet
non-P format, cell may have only 46 user data octets in P format
Cb: Required bytes for the CAS sub-block in an ATM cell
at least 250 s after activation of the port (i.e. setting pcfN[p_rx_act] = 1). During
this time the device connected to the Framer Receive Interface has to be in normal
operation.
band_width
Multiframe based SDT without CAS should not be used.
4 to
48
4 to
47
4 to
47
4+Cb
to 46
band_width
N-1
1F
SDT enable
X =
0 =
1 =
Channel mode
00 =
01 =
10 =
11 =
Reference slot indicator
1 =
H
part_fill has to be fulfilled for correct operation.
AAL0:
[aal0] = 1
AAL1 unstructured CES:
[aal0] = 0, pcfN[p_ces] = 1
AAL1 structured CES without CAS
[aal0] = 0, pcfN[p_ces] = 0, pcfN[p_cas] = 0
AAL1 structured CES with CAS
[aal0] = 0, pcfN[p_ces] = 0, pcfN[p_cas] = 1
Structured CES (with N = number of timeslots of the channel)
Unstructured CES (pcfN[p_ces] = 1)
If pcfN[p_ces] = 1 or [aal0] = 1
Disabled
Enabled
Inactive mode
Active mode (normal mode)
Standby mode
Substitute mode
This slot is a reference slot
125
PXB 4219E, PXB 4220E, PXB 4221E
2)
:
1)
:
Memory Structure
45, the condition
IWE8, V3.4
2003-01-20