PEB3265 Infineon Technologies Corporation, PEB3265 Datasheet - Page 165
PEB3265
Manufacturer Part Number
PEB3265
Description
(PEB326x / PEB426x) Dual Channel Slicofi-2 / Slic Duslic
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEB3265.pdf
(383 pages)
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Preliminary
Structure of the Second Command Byte
The second command byte specifies a particular SOP, COP or POP command,
depending on the CMD[2:0] bits of the first command byte. In the following sections, the
content of this register is described for each command group.
The second command byte specifies the initial offset for the subsequent data bytes. After
each data byte transferred the internal offset is incremented automatically. Therefore it
is possible to send a various number of data bytes with one SOP, COP or POP
command. Writing over read-only registers will not destroy their contents.
Register Description Example
At the beginning of each register description a single line gives information about
• Offset: Offset of register address (hex)
• Name: Short name of the register
• Detailed name: Detailed name of the register
• Reset value: Value of the register after reset (hex)
• Test status:
• Channel selection:
The line is organized as follows (with example):
Data Sheet
Offset
27
H
CMD[2:0] = 1 1 0
CMD[2:0] = 1 1 1
TSTR1
Name
“hw” – value depends on specific hardware fuses
“T” – the register has no effect unless the TEST-EN bit in
register LMCR1 is set to 1
“N” – the register effects both SLICOFI-2x channels,
“Y” – the register effects a specific SLICOFI-2x channel
POP command (PINE access operation programming
the EDSP).
reserved for production tests
Test Register 1
Detailed Name
SLICOFI-2x Command Structure and Programming
165
Reset
Value
00
H
Test
T
2000-07-14
Channel
DuSLIC
Per
Y
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