EL2257C Elantec Semiconductor, EL2257C Datasheet - Page 14

• Manufacturer Part Number: EL2257C
• Description: 125 MHz Single Supply/ Clamping Op Amps
• Manufacturer: Elantec Semiconductor

EL2257C/EL2357C
125 MHz Single Supply, Clamping Op Amps
As far as the output stage of the amplifier is concerned,
R
+1. As this combination gets smaller, the bandwidth
falls off. Consequently, R
should not be exceeded for optimum performance.
For A
(noise gain of 2), optimum response is obtained with R
between 500
of 5), keep R
Video Performance
For good video performance, an amplifier is required to
maintain the same output impedance and the same fre-
quency response as DC levels are changed at the output.
This can be difficult when driving a standard video load
of 150 , because of the change in output current with
DC level. Differential Gain and Differential Phase for
the EL2257C/EL2357C are specified with the black
level of the output video signal set to +1.2V. This allows
ample room for the sync pulse even in a gain of +2 con-
figuration. This results in dG and dP specifications of
0.05% and 0.05° while driving 150
Setting the black level to other values, although accept-
able, will compromise peak performance. For example,
looking at the single supply dG and dP curves for
R
f r o m 1 . 2 V t o 0 .6 V d G / d P w i l l i n c r e a s e f r o m
0.05%/0.05° to 0.08%/0.25°. Note that in a gain of +2
configuration, this is the lowest black level allowed such
that the sync tip doesn’t go below 0V.
If your application requires that the output goes to
ground, then the output stage of the EL2257C/EL2357C,
like all other single supply op amps, requires an external
pull down resistor tied to ground. As mentioned above,
the current flowing through this resistor becomes the DC
bias current for the output stage NPN transistor. As this
current approaches zero, the NPN turns off, and dG and
dP will increase. This becomes more critical as the load
resistor is increased in value. While driving a light load,
such as 1 k , if the input black level is kept above
1.25V, dG and dP are a respectable 0.03% and 0.03°.
For other biasing conditions see the Differential Gain
and Differential Phase vs. Input Voltage curves.
F
L
=150 , if the output black level clamp is reduced
+ R
V
G
= +1, R
appear in parallel with R
F
between 2 k and 10 k .
and 1 k . For A
F
= 0
is optimum. For A
F
has a minimum value that
V
= -4 or +5 (noise gain
L
for gains other than
at a gain of +2.
V
= -1 or +2
F
14
Output Drive Capability
In spite of their moderately low 5 mA of supply current,
the EL2257C/EL2357C are capable of providing ±100
mA of output current into a 10
50 . With this large output current capability, a 50
load can be driven to ±3V with V
excellent choice for driving isolation transformers in
telecommunications applications.
Driving Cables and Capacitive Loads
When used as a cable driver, double termination is
always recommended for reflection-free performance.
For those applications, the back-termination series resis-
tor will de-couple the EL2257C/EL2357C from the
cable and allow extensive capacitive drive. However,
other applications may have high capacitive loads with-
out a back-termination resistor. In these applications, a
small series resistor (usually between 5 and 50 ) can
be placed in series with the output to eliminate most
peaking. The gain resistor (R
make up for any gain loss which may be created by this
additional resistor at the output.
Disable/Power-Down
Each amplifier in the EL2257C/EL2357C can be indi-
vidually disabled, placing each output in a high-
impedance state. The disable or enable action takes only
about 40 ns. When all amplifiers are disabled, the total
supply current is reduced to 0 mA, thereby eliminating
all power consumption by the EL2257C/EL2357C. The
EL2257C/EL2357C amplifier’s power down can be
controlled by standard CMOS signal levels at each
ENABLE pin. The applied CMOS signal is relative to
the GND pin. For example, if a single +5V supply is
used, the logic voltage levels will be +0.5V and +2.0V.
If using dual ±5V supplies, the logic levels will be -4.5V
and -3.0V. Letting all ENABLE pins float will disable
the EL2257C/EL2357C. If the power-down feature is
not desired, connect all ENABLE pins to the V
The guaranteed logic levels of +0.5V and +2.0V are not
standard TTL levels of +0.8V and +2.0V, so care must
be taken if standard TTL will be used to drive the
ENABLE pins.
G
) can then be chosen to
S
load, or ±60 mA into
= ±5V, making it an
S+
pin.