Z89139 Zilog., Z89139 Datasheet - Page 41

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Z89139

Manufacturer Part Number
Z89139
Description
Voice Processing Controllers
Manufacturer
Zilog.
Datasheet
Zilog
WDT Time Select (D0, D1). These bits selects the WDT
time period. The configuration is shown in Table 10.
Notes:
TpC = XTAL clock cycle.
Tolerance = 10%
DS97TAD0201
D1
0
0
1
1
/RESET
D0‘
0
1
0
1
Select (SMR)
Table 10. WDT Time Select
WDT Select
CK Source
Stop Delay
(WDTMR)
From Stop
(WDTMR)
Recovery
2V REF .
Source
Select
XTAL
Mode
Internal RC OSC
VDD
WDT
Time-out of
100 ms min
15 ms min
25 ms min
5 ms min
12 ns Glitch Filter
+
-
4 Clock
Filter
RC
OSC.
2V Operating
Voltage Det.
XTAL Clock
Time-out of
1024 TpC
4096 TpC
256 TpC
512 TpC
Figure 30. Resets and WDT
M
U
X
P R E L I M I N A R Y
Clear
CLK
CK
5 ms POR
CLR
WDT During HALT (D2). This bit determines whether or
not the WDT is active during HALT Mode. A 1 indicates ac-
tive during HALT. The default is 1.
WDT During STOP (D3). This bit determines whether or
not the WDT is active during STOP Mode. Since XTAL
clock is stopped during STOP Mode, the on-board RC
must be selected as the clock source to the POR counter.
A 1 indicates active during STOP. The default is 1.
Clock Source for WDT (D4). This bit determines which
oscillator source is used to clock the internal POR and
WDT counter chain. If the bit is a 1, the internal RC oscil-
lator is bypassed and the POR and WDT clock source is
driven from the external pin, XTAL1. The default configu-
ration of this bit is 0 which selects the RC oscillator.
18 Clock RESET
WDT/POR Counter Chain
5 ms 15 ms 25 ms 100 ms
Generator
WDT TAP SELECT
RESET
Voice Processing Controllers
Z89138/Z89139
Internal
RESET
41
1

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