24LC32A-MT MicrochipTechnology, 24LC32A-MT Datasheet - Page 7

• Manufacturer Part Number: 24LC32A-MT
• Description: 32KI2CSerialEEPROMinISOMicromodule
• Manufacturer: MicrochipTechnology

6.0
6.1
Following the start condition from the master, the con-
trol code (four bits), the device select (three bits), and
the R/W bit which is a logic low are clocked onto the bus
by the master transmitter. This indicates to the
addressed slave receiver that a byte with a word
address will follow after it has generated an acknowl-
edge bit during the ninth clock cycle. Therefore the next
byte transmitted by the master is the high-order byte of
the word address and will be written into the address
pointer of the 24LC32A MODULE. The next byte is the
least significant address byte. After receiving another
acknowledge signal from the 24LC32A the master
device will transmit the data word to be written into the
addressed memory location.
The 24LC32A acknowledges again and the master
generates a stop condition. This initiates the internal
write cycle, and during this time the 24LC32A will not
generate acknowledge signals (see Figure 6-1).
FIGURE 6-1:
FIGURE 6-2:
BUS ACTIVITY
MASTER
SDA LINE
BUS ACTIVITY
1997 Microchip Technology Inc.
WRITE OPERATIONS
Byte Write
BUS ACTIVITY
MASTER
SDA LINE
BUS ACTIVITY
BYTE WRITE
PAGE WRITE
S
T
A
R
T
1
0
CONTROL
1
BYTE
0
0 0 0 0
S
T
A
R
T
1
0
CONTROL
A
C
K
1
BYTE
0
0 0 0 0
0 0 0 0
HIGH BYTE
ADDRESS
A
C
K
0 0 0 0
HIGH BYTE
ADDRESS
A
C
K
LOW BYTE
ADDRESS
6.2
The write control byte, word address and the first data
byte are transmitted to the 24LC32A in the same way
as in a byte write. But instead of generating a stop con-
dition, the master transmits up to 32 bytes which are
temporarily stored in the on-chip page buffer and will be
written into memory after the master has transmitted a
stop condition. After receipt of each word, the five lower
address pointer bits are internally incremented by one.
If the master should transmit more than 32 bytes prior
to generating the stop condition, the address counter
will roll over and the previously received data will be
overwritten. As with the byte write operation, once the
stop condition is received, an internal write cycle will
begin. (see Figure 6-2).
A
C
K
24LC32A MODULE
LOW BYTE
ADDRESS
Page Write
A
C
K
DATA BYTE 0
A
C
K
A
C
K
DATA
DATA BYTE 31
DS21225A-page 7
A
C
K
S
T
O
P
A
C
K
S
T
O
P