AT28BV256-20 ATMEL Corporation, AT28BV256-20 Datasheet - Page 8

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AT28BV256-20

Manufacturer Part Number
AT28BV256-20
Description
256K (32K x 8) Battery-Voltage Parallel EEPROMs
Manufacturer
ATMEL Corporation
Datasheet

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Page Mode Characteristics
Programming Algorithm
Notes:
Software Protected Program Cycle Waveforms
Notes:
8
Symbol
t
t
t
t
t
t
t
t
WC
AS
AH
DS
DH
WP
BLC
WPH
1. Data Format: I/O7 - I/O0 (Hex); Address Format: A14 - A0 (Hex).
2. Data protect state will be re-activated at the end of program cycle.
3. 1 to 64 bytes of data are loaded.
1. A0 - A14 must conform to the addressing sequence for the first three bytes as shown above.
2. A6 through A14 must specify the same page address during each high to low transition of WE (or CE) after the software
3. OE must be high only when WE and CE are both low.
AT28BV256
code has been entered.
Parameter
Write Cycle Time
Address Set-up Time
Address Hold Time
Data Set-up Time
Data Hold Time
Write Pulse Width
Byte Load Cycle Time
Write Pulse Width High
t
AS
(1)(2)(3)
LOAD LAST BYTE
t
LAST ADDRESS
ANY ADDRESS
ADDRESS 2AAA
DS
LOAD DATA AA
ADDRESS 5555
LOAD DATA A0
ADDRESS 5555
LOAD DATA XX
LOAD DATA 55
t
AH
TO
TO
TO
TO
TO
t
WP
(3)
(3)
t
t
DH
WPH
WRITES ENABLED
ENTER DATA
PROTECT STATE
(2)
(1)(2)(3)
Min
200
100
50
50
0
0
t
BLC
t
WC
Max
150
10
0273H–PEEPR–10/04
Units
ms
ns
ns
ns
ns
ns
µs
ns

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