AT29C432-12 ATMEL Corporation, AT29C432-12 Datasheet
AT29C432-12
Related parts for AT29C432-12
AT29C432-12 Summary of contents
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... Description The AT29C432 is a CMOS memory specifically designed for applications requiring both a high density nonvolatile program memory and a smaller nonvolatile data mem- ory. The AT29C432 provides this in the form megabit Flash array integrated 2 with a 256K bit full featured E PROM array on the same device. A unique feature of this device is its concurrent read while writing capability ...
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... The state of adresses and A15 - A18 spec- ify the individual byte address within a sector and the state of addresses A4 - A14 define the sector to be written. The AT29C432 employs the JEDEC standard software data protection feature; therefore, each programming se- quence must be preceded by the three byte program com- mand sequence ...
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... This sequence should then immedi- ately be followed by one to sixteen bytes of data. After the last byte has been written, the AT29C432 will automat- ically time itself to completion of the internal write cycle. The write cycle is initiated by both WE and CEE going low; ...
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... With other programmable non- volatile memories internal high voltage operations prevent the reading of data while a write operation is in process. However, the AT29C432 is partitioned in a manner to al- low read operations from the Flash memory array during a 2 write operation within the E PROM memory array ...
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... Output Leakage Current Standby Current Active Current Input Low Voltage IL V Input High Voltage IH V Output Low Voltage OL V Output High Voltage OH AT29C432-12 0°C - 70°C -40°C - 85°C 4.5V - 5.5V CEF ...
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... CEF (CEE) without impact after an address change without impact on ACC ACC Input Test Waveforms and Measurement Level < AT29C432 6 AT29C432-12 Min 100 after the specified from OE or CEF (CEE) whichever occurs first ACC pF). ACC ...
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... WE or CEF Pulse Width High t WPH t Byte Load Cycle Time BLC AC Flash Array Write Waveforms Note: 1. BYTE ADDRESS is the first destination address for the sector write operation. All write operations must begin with the three byte write enable sequence. AT29C432 Min Max 100 ...
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... PROM Array Write Waveforms Note: 1. Only A0 - A14 are valid address inputs for the E the first destination address for either a byte write or page write operation. All write operations, byte only or page write, must begin with the three byte write enable sequence. AT29C432 8 Min 0 50 ...
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... E E PROM’s internal write cycle defined by t PROM’s internal write cycle defined Having both CEF and CEE active simultaneously Having both CEF and CEE active simultaneously is an illegal state. illegal state. is not BLC AT29C432 . . WCE WCE 9 ...
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... Manufacture Code is read for Device Code is read for CEF = Low, CEE = High IH 3. The device does not remain in identification mode if powered down. 4. The device returns to standard operation mode. 5. Manufacturer Code: 1F Device Code: B4 AT29C432 10 (1) 2 PROM Software Product Identification Exit ENTER PRODUCT IDENTIFICATION ...
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... Lead, Thin Small Outline Package (TSOP) Packaging Information 40T, 40 Lead, Plastic Thin Small Outline Package (TSOP) Dimensions in Millimeters and (Inches) * *Controlling dimension: millimeters Ordering Code Package AT29C432-12TC 40T AT29C432-12TI 40T AT29C432-15TC 40T AT29C432-15TI 40T Package Type AT29C432 Operation Range Commercial ( ...