X28C010 Xicor, X28C010 Datasheet

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X28C010

Manufacturer Part Number
X28C010
Description
5 Volt/ Byte Alterable E2PROM
Manufacturer
Xicor
Datasheet

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1M
© Xicor, Inc. 1991, 1995, 1996 Patents Pending
3858-3.1 4/3/97 T1/C0/D0 SH
X28C010
FEATURES
PIN CONFIGURATIONS
V SS
I/O 0
I/O 1
I/O 2
A 16
A 15
A 12
NC
A 7
A 6
A 5
A 4
A 3
A 2
A 1
A 0
Access Time: 120ns
Simple Byte and Page Write
—Single 5V Supply
—No External High Voltages or V
—Self-Timed
Low Power CMOS:
—Active: 50mA
—Standby: 500 A
Software Data Protection
—Protects Data Against System Level
High Speed Page Write Capability
Highly Reliable Direct Write™ Cell
—Endurance: 100,000 Write Cycles
—Data Retention: 100 Years
Early End of Write Detection
—DATA Polling
—Toggle Bit Polling
Inadvertant Writes
—No Erase Before Write
—No Complex Programming Algorithms
—No Overerase Problem
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
FLAT PACK
SOIC (R)
CERDIP
X28C010
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
3858 FHD F02.1
V CC
WE
NC
A 14
A 13
A 8
A 9
A 11
OE
A 10
CE
I/O 7
I/O 6
I/O 5
I/O 4
I/O 3
13
12
10
8
6
A 1
A 2
A 4
A 6
A 12
15
14
11
9
7
5
4
5 Volt, Byte Alterable E
I/O 0
A 0
A 3
A 5
A 7
A 15
A
16
PP
17
16
2
3
I/O 2
I/O 1
NC
NC
(BOTTOM VIEW)
Control Circuits
PGA
X28C010
19
18
36
1
I/O 3
V SS
V CC
NC
21
20
34
35
I/O 5
I/O 4
NC
WE
3858 FHD F20
X28C010
22
23
25
27
29
32
33
I/O 6
I/O 7
A 10
A 11
A 8
NC
NC
24
26
28
30
31
CE
OE
A 9
A 13
A 14
1
DESCRIPTION
The Xicor X28C010 is a 128K x 8 E
with Xicor's proprietary, high performance, floating gate
CMOS technology. Like all Xicor programmable non-
volatile memories the X28C010 is a 5V only device. The
X28C010 features the JEDEC approved pinout for byte-
wide memories, compatible with industry standard
EPROMs.
The X28C010 supports a 256-byte page write operation,
effectively providing a 19 s/byte write cycle and en-
abling the entire memory to be typically written in less
than 2.5 seconds. The X28C010 also features DATA
Polling and Toggle Bit Polling, system software support
schemes used to indicate the early completion of a write
cycle. In addition, the X28C010 supports Software Data
Protection option.
Xicor E
tions requiring extended endurance. Data retention is
specified to be greater than 100 years.
I/O 0
A 7
A 6
A 5
A 4
A 3
A 2
A 1
A 0
V CC
A 11
A 13
A 14
A 16
A 15
A 12
WE
NC
NC
NC
NC
NC
NC
A 9
A 8
A 7
A 6
A 5
A 4
2
14
PROMs are designed and tested for applica-
10
11
12
13
5 4 3
6
7
8
9
2
15
PROM
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
(TOP VIEW)
X28C010
16
PLCC
2
LCC
17
1
32
18 19 20
31
29
28
27
26
25
24
23
22
30
21
A 14
A 13
A 8
A 9
A 11
OE
A 10
CE
I/O 7
X28C010
Characteristics subject to change without notice
TSOP
I/O 0
A 7
A 6
A 5
A 4
A 3
A 2
A 1
A 0
EXTENDED LCC
10
11
12
13
5
6
7
8
9
14
2
4 3
128K x 8 Bit
15
PROM, fabricated
(TOP VIEW)
X28C010
16
2
17
1
32
18 19 20
31
3858 ILL F21
3858 FHD F03.1
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
29
28
27
26
25
24
23
22
21
30
OE
A 10
CE
I/O 7
I/O 6
I/O 5
I/O 4
I/O 3
NC
NC
V SS
NC
NC
I/O 2
I/O 1
I/O 0
A 0
A 1
A 2
A 3
A 14
A 13
A 8
A 9
A 11
OE
A 10
CE
I/O 7

Related parts for X28C010

X28C010 Summary of contents

Page 1

... The Xicor X28C010 is a 128K with Xicor's proprietary, high performance, floating gate CMOS technology. Like all Xicor programmable non- Control Circuits volatile memories the X28C010 only device. The PP X28C010 features the JEDEC approved pinout for byte- wide memories, compatible with industry standard EPROMs ...

Page 2

... The Output Enable input controls the data output buffers and is used to initiate read operations. Data In/Data Out (I/O –I Data is written to or read from the X28C010 through the I/O pins. Write Enable (WE) The Write Enable input controls the writing of data to the X28C010. FUNCTIONAL DIAGRAM A 8 – – ...

Page 3

... The X28C010 features DATA Polling as a method to indicate to the host system that the byte write or page write cycle has completed. DATA Polling allows a simple bit test operation to determine the status of the X28C010, eliminating additional interrupt inputs or external hard- ware. During the internal programming cycle, any at- ...

Page 4

... READY HIGH DATA Polling can effectively halve the time for writing to the X28C010. The timing diagram in Figure 2 illustrates the sequence of events on the bus. The software flow diagram in Figure 3 illustrates one method of implement- ing the routine. NO 3858 FHD F13 4 ...

Page 5

... DATA Polling. This can be especially helpful in an array comprised of multiple X28C010 memories that is frequently updated. Toggle Bit Polling can also provide a method for status checking in multiprocessor applications. The timing diagram in Figure 4 illustrates the sequence of events on the bus ...

Page 6

... SOFTWARE DATA PROTECTION The X28C010 offers a software controlled data protec- tion feature. The X28C010 is shipped from Xicor with the software data protection NOT ENABLED: that is the device will be in the standard operating mode. In this mode data should be protected during power-up/-down operations through the use of external circuits ...

Page 7

... BLC MAX Regardless of whether the device has previously been protected or not, once the software data protection algorithm is used and data has been written, the X28C010 will automatically disable further writes unless another command is issued to cancel it further commands are issued the X28C010 will be write protected during power-down and after any subsequent power-up ...

Page 8

... E PROM programmer, the following six step algo- rithm will reset the internal protection circuit. After t the X28C010 will be in standard operating mode. Note: Once initiated, the sequence of write operations should not be interrupted. 3858 FHD F19 8 ...

Page 9

... X28C010 SYSTEM CONSIDERATIONS Because the X28C010 is frequently used in large memory arrays it is provided with a two line control architecture for both read and write operations. Proper usage can provide the lowest possible power dissipation and elimi- nate the possibility of contention where multiple I/O pins share the same bus ...

Page 10

... X28C010 ABSOLUTE MAXIMUM RATINGS* Temperature under Bias X28C010 ...................................... – +85 C X28C010I ................................... – +135 C X28C010M ................................. – +135 C Storage Temperature ....................... – +150 C Voltage on any Pin with Respect ....................................... D.C. Output Current ............................................. 5mA Lead Temperature (Soldering, 10 seconds) .............................. 300 C RECOMMEND OPERATING CONDITIONS Temperature Min ...

Page 11

... X28C010 POWER-UP TIMING Symbol PUR (2) t Power-up to Read Operation t PUW (2) Power-up to Write Operation CAPACITANCE 1MHz Symbol I/O (2) C Input/Output Capacitance (2) C Input Capacitance IN ENDURANCE AND DATA RETENTION Parameter Endurance Endurance Data Retention A.C. CONDITIONS OF TEST Input Pulse Levels Input Rise and ...

Page 12

... DATA I/O Note: (3) t min., min., and OLZ OHZ 5pF, from the point when return HIGH (whichever occurs first) to the time when the outputs are no longer driven. X28C010-12 X28C010-15 X28C010-20 X28C010-25 Min. Max. Min. 120 150 120 120 ...

Page 13

... X28C010 Write Cycle Limits Symbol (4) t Write Cycle Time WC t Address Setup Time AS t Address Hold Time AH t Write Setup Time CS t Write Hold Time CH CE Pulse Width HIGH Setup Time t OES OE HIGH Hold Time t OEH WE Pulse Width HIGH Recovery ...

Page 14

... X28C010 CE Controlled Write Cycle ADDRESS OES DATA IN DATA OUT Page Write Cycle ( (6) ADDRESS * I/O BYTE 0 *For each successive write within the page write operation –A 16 should be the same or writes to an unknown address could occur. ...

Page 15

... X28C010 DATA Polling Timing Diagram (7) ADDRESS I/O 7 Toggle Bit Timing Diagram OEH OE HIGH Z I I/O 6 beginning and ending state will vary. Note: (7) Polling operations are by definition read cycles and are therefore subject to read cycle timings OEH D OUT =X ...

Page 16

... X28C010 NOTES 16 ...

Page 17

... X28C010 PACKAGING INFORMATION 32-LEAD HERMETIC DUAL IN-LINE PACKAGE TYPE D PIN 1 SEATING PLANE 0.150 (3.8) MIN. 0.200 (5.08) 0.150 (3.18) TYP. 0.018 (0.46) 0.015 (0.33) 0.008 (0.20) NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 1.690 (42.95) MAX. 0.065 (1.65) 0.033 (0.84) 0.110 (2.79) TYP. 0.055 (1.40) 0.090 (2.29) 0.620 (15.75) 0.590 (14.99) TYP. 0.614 (15.60) 17 0.610 (15.49) 0.500 (12.70) 0.005 (0.13) MIN. ...

Page 18

... X28C010 PACKAGING INFORMATION 32-PAD CERAMIC LEADLESS CHIP CARRIER PACKAGE TYPE E PIN 1 0.200 (5.08) BSC 0.028 (0.71) 0.022 (0.56) (32) PLCS. 0.458 (11.63) 0.442 (11.22) 0.458 (11.63) 0.300 (7.62) NOTE: 1. ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 2. TOLERANCE: 1% NLT 0.005 (0.127) 0.150 (3.81) BSC 0.020 (0.51 REF. 0.095 (2.41) 0.075 (1.91) 0.022 (0.56) 0.006 (0.15) 0.055 (1.39) 0.045 (1.14) TYP ...

Page 19

... X28C010 PACKAGING INFORMATION 0.828 (21.04) 0.812 (20.64) 0.0065 (0.17) 0.004 (0.10) 0.370 (9.40) 0.300 (7.62) NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 32-LEAD CERAMIC FLAT PACK PIN 1 INDEX 1 32 0.440 (11.18) 0.430 (10.93) 0.347 (8.82) 0.333 (8.46) 19 0.019 (0.48) 0.015 (0.38) 0.055 (1.40) 0.045 (1.14) 0.045 (1.14) MAX. 0.005 (0.13) MIN. 0.130 (3.30) 0.090 (2.29) 0.047 (1.19) 0.026 (0.66) 3926 FHD F20 ...

Page 20

... X28C010 PACKAGING INFORMATION 32-LEAD PLASTIC LEADED CHIP CARRIER PACKAGE TYPE J 0.420 (10.67) 0.045 (1.14 0.495 (12.57) 0.485 (12.32) TYP. 0.490 (12.45) 0.453 (11.51) 0.447 (11.35) TYP. 0.450 (11.43) 0.300 (7.62) REF. PIN 1 NOTES: 1. ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 2. DIMENSIONS WITH NO TOLERANCE FOR REFERENCE ONLY 0.050" TYPICAL 0.510" TYPICAL 0.400" ...

Page 21

... X28C010 PACKAGING INFORMATION 36-LEAD CERAMIC PIN GRID ARRAY PACKAGE TYPE TYP. 0.180 (.010) (4.57 .25 CORNERS TYP. 0.180 (.010) (4.57 4 CORNERS PIN 1 INDEX 0.770 (19.56) 0.750 (19.05) SQ NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS ...

Page 22

... X28C010 PACKAGING INFORMATION 32-LEAD CERAMIC SMALL OUTLINE GULL WING PACKAGE TYPE R 0.340 0.007 0.0192 0.0138 0.840 MAX. 0.050 0.440 MAX. 0.560 NOM. NOTES: 1. ALL DIMENSIONS IN INCHES 2. FORMED LEAD SHALL BE PLANAR WITH RESPECT TO ONE ANOTHER WITHIN 0.004 INCHES SEE DETAIL “A” ...

Page 23

... X28C010 PACKAGING INFORMATION 32-PAD STRETCHED CERAMIC LEADLESS CHIP CARRIER PACKAGE TYPE N PIN 1 0.400 BSC 0.700 0.010 NOTE: 1. ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 2. TOLERANCE: 1% NLT 0.005 (0.127) 0.300 BSC 0.035 x 45 REF. 0.085 0.010 DETAIL A 0.020 (1.02 REF. TYP. (3) PLCS. 0.050 BSC ...

Page 24

... X28C010 PACKAGING INFORMATION 12.522 (0.493) 12.268 (0.483) 1.143 (0.045) 0.965 0.889 (0.035) PIN #1 IDENT. (0.038) O 1.016 (0.040) O 0.762 (0.030) 1 10.058 (0.396) 9.957 (0.392) A 14.148 (0.557) 13.894 (0.547) 14.80 0.05 (0.583 0.002) 0.30 (0.012 SOLDER PADS TYPICAL 40 PLACES 0.17 (0.007) 0.03 (0.001) FOOTPRINT NOTE: 1. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS (INCHES IN PARENTHESES). ...

Page 25

... A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system affect its safety or effectiveness. X28C010 Access Time – ...

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