XC68HC705F32 Motorola, XC68HC705F32 Datasheet - Page 86
XC68HC705F32
Manufacturer Part Number
XC68HC705F32
Description
MICROCONTROLLER
Manufacturer
Motorola
Datasheet
1.XC68HC705F32.pdf
(198 pages)
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8
8.3
The LCD timing signals are all derived from the main system clock. The frame rate will be f
therefore, if f
72.8 Hz for three-way multiplexing (see
in the LCD clock generator by setting FDISP in the LCD register. This will result in the frame rate
being halved. For example, when three-way multiplexing is used, a frame rate of 36.4 Hz instead
of 72.8 Hz can be obtained. See
Figure 8-3
waveforms for each of the operating modes.
The backplane waveforms are continuous and repetitive (every frame); they are fixed within each
operating mode and are not affected by the data in the LCD RAM.
The frontplane waveforms are dependent on the LCD segments to be driven as defined in the LCD
RAM. Each ‘on’ segment must have a differential driving voltage (BP–FP) applied to it once in each
frame; the LCD driver module hardware uses the data in the LCD RAM to construct the frontplane
waveform to meet this criterion.
MOTOROLA
8-4
to
OSC
Timing signals and LCD voltage waveforms
Figure 8-6
EXTVON
= 3.579 MHz, the frame rate will be 54.6 Hz for two and four-way multiplexing and
V
LCD
LIQUID CRYSTAL DISPLAY DRIVER MODULE
show the backplane waveforms and some examples of frontplane
Figure 8-2 Voltage level selection
2 BP, 1/2 Bias
Section
Table
8.4.
8-4). An extra divide-by-two stage can be included
V
SS
R3
R2
R1
V
V2
V1
LCD
INTVLCD
int. gen. V
MC68HC05F32
LCD
OSC
/2
16
,
TPG
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