TC826 TelCom Semiconductor, TC826 Datasheet - Page 8

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TC826

Manufacturer Part Number
TC826
Description
A/D CONVERTER WITH BAR GRAPH DISPLAY OUTPUT
Manufacturer
TelCom Semiconductor
Datasheet

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common-mode range when the converter and measured
system share the same power supply common (ground). If
the converter and measured system do not share the same
power supply common, –IN should be tied to analog-com-
mon. This is the usual connection for battery operated
systems. Polarity is determined at the end of signal integrate
signal phase. The sign bit is a true polarity indication in that
signals less than 1 LSB are correctly determined. This
allows precision null detection limited only by device noise
and system noise.
Reference Integrate Cycle
connected with the correct polarity to cause the integrator
output to return to zero. The time required for the output to
return to zero is proportional to the input signal and is
between 0 and 40 counts. The digital reading displayed is:
System Timing
the internal counters. The three phase measurement cycle
3-178
TC826
–IN is internally connected to analog common and +IN is
The differential input voltage must be within the device
The final phase is reference integrate or deintegrate.
The oscillator frequency is divided by 32 prior to clocking
INTEGRATOR
OUTPUT
ANALOG
COMMON
POTENTIAL
INTERNAL
SYSTEM CLOCK
(FSYS)
INTERNAL DATA
LATCH UPDATE
SIGNAL
20
=
V
V
REF
I N
AUTO–ZERO
19 COUNTS
Figure 5. TC826 Conversion Has Three Phases
PHASE (AZ)
MINIMUM
ONE CONVERSION CYCLE = 80 COUNTS ( T CONV = 80 X
INTEGRATE
PHASE (SI)
COUNTS
SIGNAL
takes a total of 80 clock pulses. The 80 count cycle is
independent of input signal magnitude.
length:
Reference Voltage Selection
reference voltage. The reference potential is measured
between REF IN (Pin 5) and ANALOG COMMON Pin 2).
Required Full-Scale Voltage
T I
20
Each phase of the measurement cycle has the following
• Auto-Zero Phase: 19 to 59 Counts
• Signal Integrate: 20 Counts
• Reference Integrate: 0 to 41 Counts
A full-scale reading requires the input signal be twice the
For signals less than full-scale the auto-zero is as-
signed the unused reference integrate time period.
This time period is fixed. The integration period is:
Where F
TRUE ZERO
CROSSING
20mV
BAR GRAPH DISPLAY OUTPUT
T D
2V
REFERENCE INTEGRATE
SIGN BIT
DETERMINED
OSC
V IN
(DEINTEGRATE)
41 COUNTS
is the externally set clock frequency.
PHASE (RI)
MAXIMUM
TELCOM SEMICONDUCTOR, INC.
T
ZERO CROSSING
DETECTED
A/D CONVERTER WITH
SI
NUMBER OF
COUNTS
PROPORTIONAL
TO V IN
= 20
FSYS
1
F
32
)
OSC
10mV
V
1V
REF

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