HIP4083 Intersil Corporation, HIP4083 Datasheet - Page 4

• Manufacturer Part Number: HIP4083
• Description: 80V/ 300mA Three Phase High Side Driver
• Manufacturer: Intersil Corporation

Pin Descriptions
NUMBER
PIN
11
16
13
10
15
14
12
6
1
2
3
5
4
7
8
9
SYMBOL
UVLO
(xHB)
(xHO)
(xHS)
CHB
(xHI)
AHO
BHO
CHO
CHS
AHB
BHB
AHS
BHS
V
V
AHI
BHI
CHI
DIS
DD
SS
Gate driver supplies. One external bootstrap diode and one capacitor are required for each. The bootstrap
diode and capacitor may be omitted when the HIP4083 is used to drive the lower gates in three phase full
bridge applications. In this case, tie all three xHB pins to V
lower FETs. In full bridge applications, the lower FETs must be turned on first at start up to refresh the boot-
strap capacitors. In high side switch applications, the load will keep xHS low and refresh should happen
automatically at start up.
Logic level inputs. Logic at these three pins controls the three output drivers, AHO, BHO and CHO. When
xHI is low, xHO is high. When xHI is high, xHO is low. DIS (Disable) overrides all input signals. xHI can be
driven by signal levels of 0V to 15V (no greater than V
current source pulls them high.
Chip ground.
Undervoltage setting. A resistor can be connected between this pin and V
set point - see Figure 7. With this pin not connected the undervoltage set point is typically 7V. When this
pin is tied to V
Disable input. Logic level input that when taken high sets all three outputs low. DIS high overrides all other
inputs. When DIS is taken low the outputs are controlled by the other inputs. DIS can be driven by signal
levels of 0V to 15V (no greater than V
driven.
Gate connections. Connect to the gates of the power MOSFETs in each phase.
MOSFET source connection. Connect the sources of the power MOSFETs and the negative side of the
bootstrap capacitors to these pins. In high side switch applications, 2mA of current will flow out of these
pins into the load when the upper FETs are off. This current is necessary to guarantee that the upper FETs
stay off. This current tends to pull xHS high. For proper refresh, the load must pull the voltage on xHS down
to at least 7V below V
minimum load necessary for proper refresh is given by the following equation: R
in this case, if the load has an impedance less than 5k , refresh will happen automatically at start up.
Positive supply rail. Bypass this pin to V
chip V
greatly simplifies the filtering requirements.
DD
are at the same potential, it is a good idea to run a separate line from the supply to each. This
DD
, the undervoltage set point is typically 6.2V.
DD
. For example, when V
HIP4083
15
DD
SS
). An internal 100 A pull-up holds DIS high when this pin is not
with a capacitor 1 F. In applications where the bus voltage and
DESCRIPTION
DD
= 12V, xHS must be pulled down to 5V. Therefore, the
DD
). If these pins are not driven, an internal 100 A
DD
and tie the xHS pins to the sources of the
SS
to program the under voltage
MIN
= 5V/2mA = 2.5k . So