HIP6005BCB Intersil Corporation, HIP6005BCB Datasheet - Page 5

• Manufacturer Part Number: HIP6005BCB
• Description: Buck Pulse-Width Modulator (PWM) Controller and Output Voltage Monitor
• Manufacturer: Intersil Corporation

BOOT (Pin 15)
This pin provides bias voltage to the upper MOSFET driver.
A bootstrap circuit may be used to create a BOOT voltage
suitable to drive a standard N-Channel MOSFET.
NC (Pin 16)
No connection.
NC (Pin 17)
No connection.
VCC (Pin 18)
Provide a 12V bias supply for the chip to this pin.
OVP (Pin 19)
The OVP pin can be used to drive an external SCR in the
event of an overvoltage condition. Output rising 15% more
than the DAC-set voltage triggers a high output on this pin
and disables PWM gate drive circuitry.
RT (Pin 20)
This pin provides oscillator switching frequency adjustment.
By placing a resistor (R
200kHz switching frequency is increased according to the
following equation:
Conversely, connecting a pull-up resistor (R
to V
following equation:
Functional Description
Initialization
The HIP6005B automatically initializes upon receipt of power.
Special sequencing of the input supplies is not necessary. The
Power-On Reset (POR) function continually monitors the input
supply voltages. The POR monitors the bias voltage at the V
pin and the input voltage (V
OCSET is equal to V
current protection). The POR function initiates soft start
operation after both input supply voltages exceed their POR
thresholds. For operation with a single +12V power source, V
and V
exceed the rising V
Soft Start
The POR function initiates the soft start sequence. An internal
10 A current source charges an external capacitor (C
the SS pin to 4V. Soft start clamps the error amplifier output
(COMP pin) and reference input (+ terminal of error amp) to
the SS pin voltage. Figure 3 shows the soft start interval with
C
pin) controls the converter’s output voltage. At t
Fs 200kHz
Fs 200kHz
SS
CC
= 0.1 F. Initially the clamp on the error amplifier (COMP
CC
reduces the switching frequency according to the
are equivalent and the +12V power source must
+
–
-------------------- -
R
-------------------- -
R
4 x 10
5 x 10
T
T
k
k
CC
7
IN
6
threshold before POR initiates operation.
less a fixed voltage drop (see over-
T
) from this pin to GND, the nominal
(R
2-114
(R
IN
T
T
) on the OCSET pin. The level on
to 12V)
to GND)
T
) from this pin
1
in Figure 3,
SS
) on
CC
HIP6005B
IN
the SS voltage reaches the valley of the oscillator’s triangle
wave. The oscillator’s triangular waveform is compared to the
ramping error amplifier voltage. This generates PHASE
pulses of increasing width that charge the output capacitor(s).
This interval of increasing pulse width continues to t
sufficient output voltage, the clamp on the reference input
controls the output voltage. This is the interval between t
t
voltage and the output voltage is in regulation. This method
provides a rapid and controlled output voltage rise. The
PGOOD signal toggles ‘high’ when the output voltage (V
pin) is within 5% of DACOUT. The 2% hysteresis built into
the power good comparators prevents PGOOD oscillation due
to nominal output voltage ripple.
Over-Current Protection
The over-current function protects the converter from a
shorted output by using the upper MOSFET’s on-resistance,
r
converter’s efficiency and reduces cost by eliminating a
current sensing resistor.
3
DS(ON)
0V
0V
0V
in Figure 3. At t
15A
10A
5A
0A
4V
2V
0V
to monitor the current. This method enhances the
FIGURE 4. OVER-CURRENT OPERATION
SOFT-START
(1V/DIV.)
FIGURE 3. SOFT START INTERVAL
3
the SS voltage exceeds the DACOUT
t
1
TIME (5ms/DIV.)
(2V/DIV.)
PGOOD
TIME (20ms/DIV.)
t
2
t
3
VOLTAGE
OUTPUT
(1V/DIV.)
2
. With
2
SEN
and