HIP6013 Intersil Corporation, HIP6013 Datasheet - Page 7

• Manufacturer Part Number: HIP6013
• Description: Buck Pulse-Width Modulator (PWM) Controller
• Manufacturer: Intersil Corporation

Feedback Compensation
Figure 7 highlights the voltage-mode control loop for a
synchronous-rectified buck converter. The output voltage
(Vout) is regulated to the Reference voltage level. The error
amplifier (Error Amp) output (V
oscillator (OSC) triangular wave to provide a pulse-width
modulated (PWM) wave with an amplitude of Vin at the
PHASE node. The PWM wave is smoothed by the output
filter (Lo and Co).
The modulator transfer function is the small-signal transfer
function of Vout/V
Gain and the output filter (Lo and Co), with a double pole
break frequency at F
the modulator is simply the input voltage (Vin) divided by the
peak-to-peak oscillator voltage V
FIGURE 7. VOLTAGE - MODE BUCK CONVERTER
V
OSC
OSC
COMPARATOR
COMPENSATION DESIGN
ERROR
AMP
V
HIP6013
E/A
DETAILED COMPENSATION COMPONENTS
PWM
E/A
Z
+
-
COMP
+
FB
-
LC
. This function is dominated by a DC
C1
REFERENCE
and a zero at F
2-168
C2
+
-
R2
DRIVER
DRIVER
Z
REF
E/A
IN
OSC
) is compared with the
Z
FB
FB
V
.
IN
ESR
PHASE
C3
(PARASITIC)
Z
. The DC Gain of
R1
L
IN
O
R3
ESR
C
V
O
OUT
V
OUT
HIP6013
Modulator Break Frequency Equations
The compensation network consists of the error amplifier
(internal to the HIP6013) and the impedance networks Z
and Z
a closed loop transfer function with the highest 0dB crossing
frequency (f
is the difference between the closed loop phase at f
180
network’s poles, zeros and gain to the components (R1, R2,
R3, C1, C2, and C3) in Figure 8. Use these guidelines for
locating the poles and zeros of the compensation network:
Compensation Break Frequency Equations
Figure 8 shows an asymptotic plot of the DC-DC converter’s
gain vs frequency. The actual Modulator Gain has a high
gain peak do to the high Q factor of the output filter and is
not shown in Figure 8. Using the above guidelines should
give a Compensation Gain similar to the curve plotted. The
open loop error amplifier gain bounds the compensation
gain. Check the compensation gain at F
capabilities of the error amplifier. The Closed Loop Gain is
constructed on the log-log graph of Figure 8 by adding the
Modulator Gain (in dB) to the Compensation Gain (in dB).
This is equivalent to multiplying the modulator transfer
function to the compensation transfer function and plotting
the gain.
The compensation gain uses external impedance networks
Z
loop. A stable control loop has a gain crossing with
-20dB/decade slope and a phase margin greater than 45
Include worst case component variations when determining
phase margin.
F
F
F
1. Pick Gain (R2/R1) for desired converter bandwidth
2. Place 1
3. Place 2
4. Place 1
5. Place 2
6. Check Gain against Error Amplifier’s Open-Loop Gain
7. Estimate Phase Margin - Repeat if Necessary
FB
LC =
Z1
Z2
o
(~75% F
and Z
=
=
FB
The equations below relate the compensation
-------------------------------------- -
2
---------------------------------
2
---------------------------------------------------- -
2
. The goal of the compensation network is to provide
IN
R2 C1
ST
ND
ST
ND
1
R1 + R3
L
0dB
1
LC
to provide a stable, high bandwidth (BW) overall
O
Zero Below Filter’s Double Pole
Pole at the ESR Zero
1
)
Zero at Filter’s Double Pole
Pole at Half the Switching Frequency
) and adequate phase margin. Phase margin
C
O
C3
F
F
P1
P2
F
=
=
ESR
----------------------------------------------------- -
2
---------------------------------
2
P2
=
R2
R3 C3
1
------------------------------------------- -
2
with the
1
--------------------- -
C1 + C2
C1 C2
ESR C
1
0dB
O
and
IN
o
.