HIP6503CB Intersil Corporation, HIP6503CB Datasheet
HIP6503CB
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HIP6503CB Summary of contents
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... ATX 5VSB voltage is applied to the chip. The 2.5V output is only active during S0 and S1/S2, and uses the 3V3 pin as input source for its internal pass element. Ordering Information TEMP. o PART NUMBER RANGE ( C) PACKAGE HIP6503CB SOIC HIP6503EVAL1 Evaluation Board 1 1-888-INTERSIL or 321-724-7143 Features • Provides 5 ACPI-Controlled Voltages - ...
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Block Diagram 12V 12V MONITOR 10.8V/9.8V 1V8IN EA3 + - TO UV DETECTOR 1V8SB TO 5VSB 40 A FAULT/MSEL UV DETECTOR UV COMP 4.15V 5VDL GND 3V3DL 5V 3V3 3V3DLSB EA4 - + 4.4V/3.4V 3V3 MONITOR 5V MONITOR 2.97V/2.8V 4.5V/4.25V ...
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Simplified Power System Diagram +5V IN +12V IN +5V SB +3.3V IN 1. 3.3V /3.3V DUAL SB 3.3V FAULT\MSEL SHUTDOWN SX 2 EN5VDL Typical Application +5V IN +12V IN +5V SB +3. OUT1 1.8V ...
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Absolute Maximum Ratings Supply Voltage +7.0V 5VSB 12V. . ...
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Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted Refer to Figures 1, 2 and 3 (Continued) PARAMETER (Note 2) DRV2 Output Drive Current DRV2 Output Impedance 3.3V /3.3V LINEAR REGULATOR (V DUAL SB Sleep State Regulation 3V3DL Nominal Voltage Level ...
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Functional Pin Description 3V3 (Pin 7) Connect this pin to the ATX 3.3V output. This pin provides the output current for the 2V5CLK pin, and is monitored for power quality. 5VSB (Pin 2) Provide a very well de-coupled 5V bias ...
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This pin is the output of the internal 1.8V regulator (V This internal regulator operates for as long as 5VSB is applied to the HIP6503. This pin is monitored for under- voltage events. 1V8IN (Pin 20) This ...
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S3 S5 3.3V, 5V, 12V 3V3DLSB DLA 3V3DL 5VDLSB 5VDL FIGURE 5. 5V TIMING DIAGRAM FOR EN5VDL = 0; DUAL 3V /3V DUAL SB Not shown in these diagrams is the deglitching feature used to protect against false sleep ...
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ATX outputs are well within regulation limits. SOFT-START INTO ACTIVE STATES (S0, S1) If both S3 and S5 are logic high at the time the 5VSB is applied, the HIP6503 will assume active state wake-up ...
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In HIP6503 applications, loss of any one active ATX output (3. 12V ; as detected by the on-board voltage monitors) during active state operation causes the chip to switch to S5 sleep state, ...
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high-frequency decoupling capacitors should be placed as close as possible to the load they are decoupling; the ones decoupling the controller close to the controller pins, the ones decoupling the load close to the load connector or the load itself ...
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CAPACITANCE ( F) FIGURE 11. C OUTPUT CAPACITOR OUT4 Input Capacitors Selection The input capacitors for an HIP6503 application have to have a sufficiently low ESR as to not allow the input voltage to ...
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... ATX supply outputs. Q4 can also be a PNP, such as an MMBT2907AL. For detailed information on the circuit, including a Bill-of-Materials and circuit board description, see Application Note AN9901. ), the ICH2 Also see Intersil Corporation’s web page OUT3 (www.intersil.com) or Intersil’s AnswerFAX MEM clock voltage (321-724-7800) for the latest information ...
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... All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with- out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use ...