ML4803IP-1 Micro Linear, ML4803IP-1 Datasheet - Page 6

• Manufacturer Part Number: ML4803IP-1
• Description: 8-Pin PFC and PWM Controller Combo
• Manufacturer: Micro Linear

ML4803
FUNCTIONAL DESCRIPTION
enough to trip the V
zener is 10mA. External series resistance is required in
order to limit the current through this Zener in the case
where the V
GND
GND is the return point for all circuits associated with
this part. Note: a high-quality, low impedance ground is
critical to the proper operation of the IC. High frequency
grounding techniques should be used.
POWER FACTOR CORRECTION
Power factor correction makes a nonlinear load look like a
resistive load to the AC line. For a resistor, the current
drawn from the line is in phase with, and proportional to,
the line voltage. This is defined as a unity power factor is
(one). A common class of nonlinear load is the input of a
most power supplies, which use a bridge rectifier and
capacitive input filter fed from the line. Peak-charging
effect, which occurs on the input filter capacitor in such a
supply, causes brief high-amplitude pulses of current to
flow from the power line, rather than a sinusoidal current
in phase with the line voltage. Such a supply presents a
power factor to the line of less than one (another way to
state this is that it causes significant current harmonics to
appear at its input). If the input current drawn by such a
supply (or any other nonlinear load) can be made to
follow the input voltage in instantaneous amplitude, it
will appear resistive to the AC line and a unity power
factor will be achieved.
To hold the input current draw of a device drawing power
from the AC line in phase with, and proportional to, the
6
CC
voltage exceeds the zener clamp level.
CC
OVP. The max current through this
+
DC
VIN
REF
OSC
I1
L1
U4
+
–
EA
RAMP
CLK
U3
Figure 2. Typical Trailing Edge Control Scheme.
SW2
SW1
+
–
(Continued)
U1
I2
C1
I4
I3
D
R
DFF
CLK
U2
RL
Q
Q
input voltage, a way must be found to prevent that device
from loading the line except in proportion to the
instantaneous line voltage. The PFC section of the
ML4803 uses a boost-mode DC-DC converter to
accomplish this. The input to the converter is the full wave
rectified AC line voltage. No filtering is applied following
the bridge rectifier, so the input voltage to the boost
converter ranges, at twice line frequency, from zero volts
to the peak value of the AC input and back to zero. By
forcing the boost converter to meet two simultaneous
conditions, it is possible to ensure that the current that the
converter draws from the power line matches the
instantaneous line voltage. One of these conditions is that
the output voltage of the boost converter must be set
higher than the peak value of the line voltage. A
commonly used value is 385VDC, to allow for a high line
of 270VAC
the converter is allowed to draw from the line at any given
instant must be proportional to the line voltage.
Since the boost converter topology in the ML4803 PFC is
of the current-averaging type, no slope compensation is
required.
LEADING/TRAILING MODULATION
Conventional Pulse Width Modulation (PWM) techniques
employ trailing edge modulation in which the switch will
turn ON right after the trailing edge of the system clock.
The error amplifier output voltage is then compared with
the modulating ramp. When the modulating ramp reaches
the level of the error amplifier output voltage, the switch
will be turned OFF. When the switch is ON, the inductor
February 1999
RAMP
VSW1
RMS
VEAO
. The other condition is that the current that
TIME
TIME