LM78 National Semiconductor, LM78 Datasheet - Page 25

• Manufacturer Part Number: LM78
• Description: Microprocessor System Hardware Monitor
• Manufacturer: National Semiconductor

Bit
7–0
Bit
0
1
2
3
4
5
6
7
Functional Description
13.2 Data Register (Port x6h)
Power on default
13.3 Configuration Register — Address 40h
Power on default
Start
SMI Enable
NMI/IRQ
Enable
INT__Clear
RESET
NMI/IRQ
Select
Power Switch
Bypass
INITIALIZATION
Data
Name
Name
Read/Write
<
<
Read/
7:0
Write
7:0
>
>
= 00h
= 00001000 binary
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/
Write
Data to be read from or to be written to RAM and Register.
(Continued)
A one enables startup of monitoring operations, a zero puts the part in standby mode.
Note: The outputs of Interrupt pins will not be cleared if the user writes a zero to this
location after an interrupt has occurred unlike “INT__Clear” bit.
A one enables the SMI Interrupt output.
A one enables the NMI/IRQ Interrupt output.
A one disables the SMI and NMI/IRQ outputs without affecting the contents of Interrupt
Status Registers. The device will stop monitoring. It will resume upon clearing of this
bit.
A one outputs at least a 20 ms active low reset signal at RESET if
Mask Register 2. This bit is cleared once the pulse has gone inactive.
A one selects NMI, and a zero selects IRQ.
A one in this bit drives a zero on Power Switch Bypass pin.
A one restores power on default value to all registers except the Serial Bus Address
register. This bit clears itself since the power on default is zero.
25
Description
Description
<
7
>
= 1 in SMI
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