P80C592 Philips Semiconductors, P80C592 Datasheet - Page 92

• Manufacturer Part Number: P80C592
• Description: 8-bit microcontroller with on-chip CAN
• Manufacturer: Philips Semiconductors

Philips Semiconductors
22.1.2
Table 93 Example for calculating the maximum bit-time
22.2
22.2.1
The P8xC592 features an on-chip differential transceiver
including output driver and input comparator both being
configurable (see Fig.36). Therefore it supports many
types of common transmission media such as:
The P8xC592 can directly drive a differential bus line.
An example is given in Fig.37 for a bus line having a
characteristic impedance of 120 . Direct interfacing to
the bus line is well suited for applications with limited
requirements concerning electromagnetic susceptibility,
wiring failure tolerance and protection against transients.
22.2.2
Fig.38 shows a versatile transceiver implementation
designed for automotive applications. It features a bit rate
of up to 1 Mbit/s and dissipates low power during standby
(1.4 mA). Thus it is suitable also for applications requiring
a Sleep mode function with system activation via the bus
line. The transceiver provides and extended common
mode range for high electromagnetic susceptibility
performance.
Two external driver transistors amplify the output current
to 35 mA typically and provide protection against
overvoltage conditions on the bus line (e.g. due to an
accidental short-circuit between a bus wire and battery
voltage). The serial diodes prevent in combination with the
transistors the bus from being blocked in case of a bus not
powered. More than 32 nodes may be connected to the
bus line.
1996 Jun 27
t
n
n
n
n
t
MAX TRANSFER TIME
BIT
DATA BYTES, WORST CASE
DATA BYTES
BIT MAX LATENCY
MESSAGE
Single-wire bus line
Two-wire bus line (differential)
Optical cable bus line.
8-bit microcontroller with on-chip CAN
Connecting a P8xC592 to a bus line
(physical layer)
-----------------------------
130
C
O
T
10 ms
RANSCEIVER FOR
ALCULATING THE MAXIMUM BIT
N
-C
+
= 4
92
HIP
92
T
=
130
RANSCEIVER
= 10 ms
0.045 ms
STATEMENT
= 6
I
N
-
VEHICLE
=
45 s
C
-
TIME
OMMUNICATION
92
assumption
longest message in that network; assumption
‘our message’; assumption
using Equation (3) and (4)
using Equation (2)
using Equation (1)
22.2.3
Using the P8xC592 a superior wiring failure tolerance and
detection performance can be achieved. This requires
both bus lines to be mutually decoupled as shown in
Fig.39. Each bus wire is based separately to a reference
voltage of
The diodes suppress reverse current in case of a
termination circuit being not properly powered or a bus line
being short i.e. to a voltage higher than 5 V. Applying this
bus termination circuit the following wiring failures on the
bus are detectable and can be handled:
A bus failure can be detected e.g. by a drop out of a status
message, regularly being transmitted on the bus. If a bus
wire is corrupted the following actions have to be taken:
As a consequence communication will continue on that
bus wire not being corrupted. The required reference
voltage and the switches for the comparator inputs are
provided on-chip. An output driver stage can be disabled
by reconfiguration of the on-chip output driver
(reprogramming of the Output Control Register of the
P8xC592; see Section 13.5.11, Table 51). To find out
which of the bus wires is corrupted a heuristic method is
applied.
Interruption of one bus wire at any location.
Short-circuit of one bus wire to ground or battery
voltage.
Short-circuit between the bus wires.
Switch the corresponding comparator input over to a
reference voltage of
Disable the corresponding output driver stage.
D
F
AILURES
1
ETECTION AND
2
AV
DD
.
COMMENTS
1
2
H
AV
ANDLING OF
DD
.
Product specification
B
US
P8xC592
W
IRING