P89C660 Philips Semiconductors, P89C660 Datasheet - Page 77

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P89C660

Manufacturer Part Number
P89C660
Description
80C51 8-bit Flash microcontroller family
Manufacturer
Philips Semiconductors
Datasheet

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1. Parameters are valid over operating temperature range unless otherwise specified.
2. Load capacitance for port 0, ALE, and PSEN = 100 pF, load capacitance for all other outputs = 80 pF.
3. Interfacing the microcontroller to devices with float times up to 45ns is permitted. This limited bus contention will not cause damage to Port 0 drivers.
4. Parts are tested to 2 MHz, but are guaranteed to operate down to 0 Hz.
Philips Semiconductors
AC ELECTRICAL CHARACTERISTICS (6 CLOCK MODE)
T
NOTES:
2002 Oct 28
amb
SYMBOL
1/t
t
t
t
t
t
t
t
t
t
t
t
Data Memory
t
t
t
t
t
t
t
t
t
t
t
t
t
t
External Clock
t
t
t
t
Shift Register
t
t
t
t
t
LHLL
AVLL
LLAX
LLIV
LLPL
PLPH
PLIV
PXIX
PXIZ
AVIV
PLAZ
RLRH
WLWH
RLDV
RHDX
RHDZ
LLDV
AVDV
LLWL
AVWL
QVWX
WHQX
QVWH
RLAZ
WHLH
CHCX
CLCX
CLCH
CHCL
XLXL
QVXH
XHQX
XHDX
XHDV
80C51 8-bit Flash microcontroller family
16KB/32KB/64KB ISP/IAP Flash with 512B/1KB/2KB/8KB RAM
CLCL
= 0 C to +70 C, V
FIGURE
58, 59
58, 59
58, 59
58, 59
58, 59
58, 59
58, 59
58, 59
58, 59
58, 59
58, 59
58, 59
58, 59
57
57
57
57
57
57
57
57
57
57
57
57
59
61
61
61
61
60
60
60
60
60
CC
Oscillator frequency
ALE pulse width
Address valid to ALE low
Address hold after ALE low
ALE low to valid instruction in
ALE low to PSEN low
PSEN pulse width
PSEN low to valid instruction in
Input instruction hold after PSEN
Input instruction float after PSEN
Address to valid instruction in
PSEN low to address float
RD pulse width
WR pulse width
RD low to valid data in
Data hold after RD
Data float after RD
ALE low to valid data in
Address to valid data in
ALE low to RD or WR low
Address valid to WR low or RD low
Data valid to WR transition
Data hold after WR
Data valid to WR high
RD low to address float
RD or WR high to ALE high
High time
Low time
Rise time
Fall time
Serial port clock cycle time
Output data setup to clock rising edge
Output data hold after clock rising edge
Input data hold after clock rising edge
Clock rising edge to input data valid
= 5 V
10% or –40 C to +85 C, V
PARAMETER
CC
= 5 V 5%, V
77
SS
= 0 V
3.5t
0.5t
0.5t
0.5t
1.5t
1.5t
0.5t
0.5t
0.5t
3t
3t
5t
2t
t
t
CLCL
CLCL
CLCL
CLCL
CLCL
CLCL
6t
CLCL
VARIABLE CLOCK
P89C660/P89C662/P89C664/
1, 2, 3
CLCL
CLCL
CLCL
CLCL
CLCL
CLCL
CLCL
CLCL
MIN
CLCL
20
20
0
0
0
0
–40
–100
–100
–133
–30
–75
–130
–20
–20
–20
–45
–50
–25
–20
–20
4.5t
1.5t
0.5t
2.5t
2.5t
1.5t
0.5t
t
t
4t
5t
CLCL
CLCL
2t
t
CLCL
CLCL
CLCL
CLCL
CLCL
MAX
CLCL
CLCL
CLCL
CLCL
CLCL
CLCL
20
10
–t
0
–t
5
5
–20
–150
–133
CHCX
CLCX
–65
–165
4
+50
+20
–60
–20
–80
–90
20 MHz CLOCK
MIN
300
117
10
30
50
50
25
25
45
20
5
5
5
0
0
0
5
5
0
P89C668
MAX
125
117
35
15
45
10
35
50
60
45
5
5
0
Product data
4
UNIT
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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