X40010 Xicor, X40010 Datasheet - Page 3

• Manufacturer Part Number: X40010
• Description: Dual Voltage Monitor with Integrated CPU Supervisor
• Manufacturer: Xicor

PIN DESCRIPTION (Continued)
X40010/X40011/X40014/X40015 – Preliminary
PRINCIPLES OF OPERATION
Power On Reset
Application of power to the X40010/11/14/15 activates a
Power On Reset Circuit that pulls the RESET/RESET
pins active. This signal provides several benefits.
– It prevents the system microprocessor from starting to
– It prevents the processor from operating prior to stabili-
– It allows time for an FPGA to download its configuration
– It prevents communication to the EEPROM, greatly
When V
t
(X40011) and RESET (X40010) pin allowing the system
to begin operation.
Low Voltage V
During operation, the X40010/11/14/15 monitors the V
level and asserts RESET/RESET if supply voltage falls
below a preset minimum V
signal prevents the microprocessor from operating in a
power fail or brownout condition. The V1FAIL signal
remains active until the voltage drops below 1V. It also
remains active until V
t
Low Voltage V2 Monitoring
The X40010/11/14/15 also monitors a second voltage
level and asserts V2FAIL if the voltage falls below a
preset minimum V
ORed with RESET to prevent the microprocessor from
operating in a power fail or brownout condition or used to
interrupt the microprocessor with notification of an
REV 1.3.4 7/12/02
SOIC TSSOP
PURST
PURST
operate with insufficient voltage.
zation of the oscillator.
prior to initialization of the circuit.
reducing the likelihood of data corruption on power up.
5
6
7
8
Pin
.
CC
(selectable) the circuit releases the RESET
7
8
1
2
exceeds the device V
CC
Name
WDO
SDA
SCL
V
(V1 Monitoring)
TRIP2
CC
CC
returns and exceeds V
. The V2FAIL signal is either
Serial Data. SDA is a bidirectional pin used to transfer data into and out of the device. It has an
open drain output and may be wire ORed with other open drain or open collector outputs. This pin
requires a pull up resistor and the input buffer is always active (not gated).
Watchdog Input. A HIGH to LOW transition on the SDA (while SCL is toggled from HIGH to
LOW and followed by a stop condition) restarts the Watchdog timer. The absence of this tran-
sition within the watchdog time out period results in WDO going active.
Serial Clock. The Serial Clock controls the serial bus timing for data input and output.
WDO Output. WDO is an active LOW, open drain output which goes active whenever the
watchdog timer goes active.
Supply Voltage
TRIP1
TRIP1
. The RESET/RESET
threshold value for
TRIP1
www.xicor.com
CC
for
impending power failure. For the X40010/11 the V2FAIL
signal remains active until the V
falling). It also remains active until V2MON returns and
exceeds V
monitors the power supply connected to the V2MON pin.
If V
For the X40014/15 devices, the V2FAIL signal remains
actice until V
V2MON returns and exceeds V
is powered by V
tored.
Figure 1. Two Uses of Multiple Voltage Monitoring
Notice: No external components required to monitor two voltages.
Unreg.
Supply
Resistors selected so 3V appears on V2MON when unregulated
CC
6–10V
Function
= 0, V2MON can still be monitored.
1M
1M
TRIP2
CC
1.2V
3.3V
Reg
Reg
drops below 1Vx and remains active until
CC
by 0.2V. This voltage sense circuitry
Reg
5V
. If V
Characteristics subject to change without notice.
supply reaches 6V.
V
V2MON
CC
CC
X40014-C
V2MON
(2.9V)
= 0, V2MON cannot be moni-
X40011-A
V
CC
RESET
V2FAIL
TRIP2
RESET
V2FAIL
CC
drops below 1V (V
. This sense circuitry
V
CC
V
CC
V2MON
System
Reset
System
Reset
3 of 25
CC