X5083 Xicor, X5083 Datasheet

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X5083

Manufacturer Part Number
X5083
Description
CPU Supervisor with 8Kbit SPI EEPROM
Manufacturer
Xicor
Datasheet

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FEATURES
• Low V
• Selectable time out watchdog timer
• Long battery life with low power consumption
• 8Kbits of EEPROM
• Save critical data with Block Lock
• Built-in inadvertent write protection
• SPI Interface - 3.3MHz clock rate
• Minimize programming time
• SPI modes (0,0 & 1,1)
• Available packages
BLOCK DIAGRAM
REV 1.1.6 6/25/02
CS/WDI
—Four standard reset threshold voltages
—Re-program low V
—Reset signal valid to V
—<50µA max standby current, watchdog on
—<1µA max standby current, watchdog off
—<400µA max active current during read
—Block lock first or last page, any 1/4 or lower 1/2
—Write enable latch
—Write protect pin
—16 byte page write mode
—5ms write cycle time (typical)
—8-lead TSSOP, 8-lead SOIC, 8-Lead PDIP
SCK
V
4.63V, 4.38V, 2.93V, 2.63V
using special programming sequence.
of EEPROM array
WP
SO
CC
SI
CC
detection and reset assertion
V
TRIP
CC
Protect Logic
Command
+
-
Watchdog
Decode &
Transition
reset threshold voltage
CPU Supervisor with 8Kbit SPI EEPROM
Detector
Control
CC
Logic
= 1V
Reset & Watchdog
POR and Low
Voltage Reset
memory
Timebase
Generation
Watchdog
EEPROM
Register
Status
8Kbits
Array
Timer
Reset
www.xicor.com
X5083
APPLICATIONS
• Communications Equipment
• Industrial Systems
• Computer Systems
• Battery Powered Equipment
Typical Application
—Routers, Hubs, Switches
—Set Top Boxes
—Process Control
—Intelligent Instrumentation
—Desktop Computers
—Network Servers
RESET (X5083)
2.7-5.0V
X5083
Standard V
See “Ordering Information” on page 21 for
For Custom Settings, call Xicor.
Characteristics subject to change without notice.
more details
4.63V (+/-2.5%)
4.38V (+/-2.5%)
2.93V (+/-2.5%)
2.63V (+/-2.5%)
X5083
VCC
VSS
RESET
SCK
WP
CS
SO
SI
TRIP
10K
Level
VCC
RESET
SPI
VSS
uC
Suffix
-4.5A
-2.7A
-4.5
-2.7
1 of 21

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X5083 Summary of contents

Page 1

... Industrial Systems —Process Control —Intelligent Instrumentation • Computer Systems —Desktop Computers —Network Servers • Battery Powered Equipment ™ Typical Application memory POR and Low Voltage Reset RESET (X5083) Generation Reset & Watchdog Timebase Watchdog Timer Reset Status Register EEPROM Array 8Kbits www ...

Page 2

... CC falls below the minimum thresholds are available, however, Xicor’s TRIP 8-Lead SOIC, PDIP RESET X5083 3 6 SCK Function rises above the CC Characteristics subject to change without notice. trip CC returns to the ...

Page 3

... X5083 PRINCIPLES OF OPERATION Power On Reset Application of power to the X5083 activates a power on reset circuit. This circuit goes LOW at 1V and pulls the RESET pin active. This signal prevents the system microprocessor from starting to operate with insuffi- cient voltage or prior to stabilization of the oscillator. ...

Page 4

... Note: This operation also writes 00h to array address 03h. > 3V 15–18V 15-18V 02h Write X5083 www.xicor.com voltage, apply the desired TRIP . Then send a WREN Bits 00h 0003h ...

Page 5

... X5083 Figure 4. V Programming Sequence TRIP New V CC Old V Applied + Error CC Emax = Maximum Desired Error SPI Serial Memory The memory portion of the device is a CMOS serial EEPROM array with Xicor’s block lock protection. The array is internally organized The device features a Serial Peripheral Interface (SPI) and software protocol allowing operation on a simple four-wire bus ...

Page 6

... X5083 Write Enable Latch The device contains a Write Enable Latch. This latch must be SET before a Write Operation is initiated. The WREN instruction will set the latch and the WRDI instruction will reset the latch (Figure 7). This latch is automatically reset upon a power-up condition and after the completion of a valid Write Cycle ...

Page 7

... X5083 Read Sequence When reading from the EEPROM memory array first pulled low to select the device. The 8-bit READ instruction is transmitted to the device, followed by the 16-bit address. After the READ opcode and address are sent, the data stored in the memory at the selected address is shifted out on the SO line ...

Page 8

... X5083 Figure 5. Read Operation Sequence SCK Read Instruction (1 Byte) SI High Impedance SO Figure 6. Read Status Operation Sequence CS 0 SCK SI SO Figure 7. WREN/WRDI Sequence CS SCK SI SO REV 1.1.6 6/25/ Byte Address (2 Byte ...

Page 9

... X5083 Figure 8. EEPROM Array Write Sequence SCK Instruction SCK Data Byte Figure 9. Status Register Write Sequence CS 0 SCK SI High Impedance SO REV 1.1.6 6/25/ Bit Address ...

Page 10

... X5083 Figure 10. Read Nonvolatile Write Status SCK READ STATUS INSTRUCTION SI NONVOLATILE WRITE IN PROGRESS SO SO MSB HIGH while in the Nonvolatile write cycle SCK READ STATUS INSTRUCTION SI NONVOLATILE WRITE ENDS SO 1st detected SO MSB LOW indicates end of Nonvolatile write cycle REV 1 ...

Page 11

... X5083 Figure 11. End of Nonvolatile Write (no Polling) CS SCK SI Non-volatile Write Operation SYMBOL TABLE WAVEFORM INPUTS OUTPUTS Must be Will be steady steady May change Will change from LOW from LOW to HIGH to HIGH May change Will change from HIGH from HIGH to LOW to LOW Don’t Care: ...

Page 12

... X5083 ABSOLUTE MAXIMUM RATINGS Temperature under bias .................. –65°C to +135°C Storage temperature ....................... –65°C to +150°C Voltage on any pin with respect to V ......................................–1.0V to +7V SS D.C. output current ............................................... 5mA Lead temperature (soldering, 10 seconds)........ 300°C RECOMMENDED OPERATING CONDITIONS Temperature Min. Commercial 0°C Industrial – ...

Page 13

... X5083 POWER-UP TIMING Symbol Parameter (2) t Power-up to read operation PUR (2) t Power-up to write operation PUW CAPACITANCE T = +25° 1MHz Symbol (2) C Output capacitance (SO, RESET, RESET) OUT (2) C Input capacitance (SCK, SI, CS, WP) IN Notes: (1) V min. and V max. are for reference only and are not tested. ...

Page 14

... X5083 Data Output Timing Symbol f Clock frequency SCK t Output disable time DIS t Output valid from clock low V t Output hold time HO (3) t Output rise time RO (3) t Output fall time FO Notes: (3) This parameter is periodically sampled and not 100% tested. ( the time from the rising edge of CS after a valid write sequence has been sent to the end of the self-timed internal nonvolatile WC write cycle ...

Page 15

... CC PURST 0 Volts t PURST t R RESET RESET Output Timing Symbol V Reset trip point voltage, X5083PT-4.5A (See note 6) TRIP Reset trip point voltage, X5083PT Reset trip point voltage, X5083PT-2.7A Reset trip point voltage, X5083PT-2.7 t Power-up reset time out PURST ( detect to reset/output ...

Page 16

... X5083 V Programming Timing Diagram TRIP TRIP VPS CS SCK SI 06h WREN V Programming Parameters TRIP Parameter t V program enable voltage setup time VPS TRIP t V program enable voltage hold time VPH TRIP t V programming CS inactive time PCS TRIP t V setup time ...

Page 17

... X5083 PACKAGING INFORMATION Half Shoulder Width On All End Pins Optional .073 (1.84) Typ. 0.010 (0.25) NOTE: 1. ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 2. PACKAGE DIMENSIONS EXCLUDE MOLDING FLASH REV 1.1.6 6/25/02 8-Lead Plastic Dual In-Line Package Type P 0.430 (10.92) 0.360 (9.14) Pin 1 Index Pin 1 0.300 (7.62) Ref. Seating Plane 0.150 (3.81) ...

Page 18

... X5083 PACKAGING INFORMATION 8-Lead Plastic Small Outline Gull Wing Package Type S Pin 1 Index 0.010 (0.25) 0.020 (0.50) 0° - 8° 0.016 (0.410) 0.037 (0.937) NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) REV 1.1.6 6/25/02 Pin 1 0.014 (0.35) 0.019 (0.49) 0.188 (4.78) 0.197 (5.00) (4X) 7° 0.050 (1.27) X 45° 0.0075 (0.19) 0.010 (0.25) FOOTPRINT www ...

Page 19

... X5083 PACKAGING INFORMATION 0° – 8° See Detail “A” NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) REV 1.1.6 6/25/02 8-Lead Plastic, TSSOP, Package Type V .025 (.65) BSC .169 (4.3) .177 (4.5) .114 (2.9) .122 (3.1) .047 (1.20) .0075 (.19) .002 (.05) .006 (.15) .0118 (.30) .010 (.25) Gage Plane Seating Plane .019 (.50) .029 (.75) Detail A (20X) ...

Page 20

... I = 4.5 to 5.5V, -40 to +85°C, V TRIP = 4.5-4.75V AL = 4.5 to 5.5V +70°C, V TRIP = 4.5-4.75V AM = 4.5 to 5.5V, -40 to +85°C, V TRIP www.xicor.com Part Number RESET (Active LOW) X5083P-4.5A X5083S8-4.5A X5083S8I-4.5A X5083P X5083S8 X5083S8I X5083V8 X5083S8-2.7A X5083S8I-2.7A X5083V8-2.7A X5083S8-2.7 X5083S8I-2.7 X5083V8-2 2.55-2.7V TRIP = 2.55-2.7V TRIP = 2.85-3.0V TRIP = 2.85-3.0V TRIP = 4.25-4.5V TRIP = 4.25-4.5V TRIP = 4.5-4.75V TRIP = 4 ...

Page 21

... X5083 LIMITED WARRANTY Devices sold by Xicor, Inc. are covered by the warranty and patent indemnification provisions appearing in its Terms of Sale only. Xicor, Inc. makes no warranty, express, statutory, implied description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. ...

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