X5083 Xicor, X5083 Datasheet - Page 3
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X5083
Manufacturer Part Number
X5083
Description
CPU Supervisor with 8Kbit SPI EEPROM
Manufacturer
Xicor
Datasheet
1.X5083.pdf
(21 pages)
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X5083
PRINCIPLES OF OPERATION
Power On Reset
Application of power to the X5083 activates a power on
reset circuit. This circuit goes LOW at 1V and pulls the
RESET pin active. This signal prevents the system
microprocessor from starting to operate with insuffi-
cient voltage or prior to stabilization of the oscillator.
RESET active also blocks communication to the device
through the SPI interface. When V
device V
releases RESET, allowing the processor to begin exe-
cuting code. While V
device are inhibited.
Low Voltage Monitoring
During operation, the X5083 monitors the V
and asserts RESET if supply voltage falls below a pre-
set minimum V
microprocessor from operating in a power fail or
brownout condition and terminates any SPI communi-
cation in progress. The RESET signal remains active
until the voltage drops below 1V. It also remains active
until V
When V
progress are terminated and communications are
inhibited until V
Watchdog Timer
The watchdog timer circuit monitors the microprocessor
activity by monitoring the WDI input. The microprocessor
must toggle the CS/WDI pin periodically to prevent a
RESET signal. The CS/WDI pin must be toggled from
Figure 1. Set V
REV 1.1.6 6/25/02
SCK
WP
CS
SI
CC
CC
TRIP
returns and exceeds V
0 1 2 3 4 5 6 7
falls below V
value for 200ms (nominal) the circuit
CC
TRIP
TRIP
exceeds V
. The RESET signal prevents the
WREN
CC
Level Sequence (V
06h
< V
TRIP
TRIP
TRIP
, any communications in
TRIP
communications to the
for t
for 200ms.
PURST
CC
CC
exceeds the
.
0 1 2 3 4 5 6 7 8 9 10
= desired V
CC
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level
V
Write
02h
P
= 15-18V
TRIP
HIGH to LOW prior to the expiration of the watchdog time
out period. The state of two nonvolatile control bits in the
status register determine the watchdog timer period. The
microprocessor can change these watchdog bits with no
action taken by the microprocessor these bits remain
unchanged, even after total power failure.
V
The X5083 is shipped with a standard V
(V
operating and storage conditions. However, in applica-
tions where the standard V
higher precision is needed in the V
X5083 threshold may be adjusted. The procedure is
described below, and uses the application of a high
voltage control signal.
Setting the V
This procedure is used to set the V
voltage value. For example, if the current V
and the new V
make the change. If the new setting is to be lower than
the current setting, then it is necessary to reset the trip
point before setting the new value.
To set the new V
threshold voltage to the V
the programming voltage V
mand, followed by a write of Data 00h to address 01h.
CS going HIGH on the write operation initiates the
V
plete the operation.
Note: This operation also writes 00h to array address
01h.
value)
CC
TRIP
TRIP
Threshold Reset Procedure
programming sequence. Bring WP LOW to com-
) voltage. This value will not change over normal
Address
16 Bits
TRIP
0001h
TRIP
20 21 22 23
TRIP
Characteristics subject to change without notice.
Voltage
is 4.6V, this procedure will directly
voltage, apply the desired V
CC
TRIP
P
. Then send a WREN com-
pin and tie the WP pin to
is not exactly right, or if
Data
00h
TRIP
TRIP
CC
TRIP
to a higher
value, the
threshold
is 4.4V
3 of 21
TRIP