M40Z100WMH1TR ST Microelectronics, M40Z100WMH1TR Datasheet - Page 4

• Manufacturer Part Number: M40Z100WMH1TR
• Description: NVRAM CONTROLLER for up to TWO LPSRAM
• Manufacturer: ST Microelectronics

M40Z111, M40Z111W
Table 3. AC Measurement Condition
Note that Output Hi-Z is defined as the point where data is no
longer driven.
Manufacturers generally specify a typical condition
for room temperature along with a worst case
condition (generally at elevated temperatures). The
system level requirements will determine the
choice of which value to use. The data retention
current value of the SRAMs can then be added to
the I
the total current requirements for data retention.
The available battery capacity for the SNAPHAT of
your choice can then be divided by this current to
determine the amount of data retention available
(see Table 7). For more information on Battery
Storage Life refer to the Application Note AN1012.
V
SIENTS
I
switching, can produce voltage fluctuations, result-
ing in spikes on the V
be reduced if capacitors are used to store energy,
which stabilizes the V
the bypass capacitors will be released as low going
spikes are generated or energy will be absorbed
when overshoots occur.
Table 4. Capacitance
(T
Note: 1. Sampled only, not 100% tested.
4/12
CC
Input Rise and Fall Times
Input Pulse Voltages
Input and Output Timing Ref. Voltages
CC
A
transients, including those produced by output
Symbol
= 25 C; f = 1MHz)
C
CCDR
NOISE AND NEGATIVE-GOING TRAN-
OUT
2. Outputs deselected.
C
IN
(2)
value of the M40Z111/111W to determine
Input Capacitance
Output Capacitance
CC
CC
(1)
Parameter
bus. These transients can
bus. The energy stored in
1.5V
0 to 3V
5ns
Test Condition
V
V
OUT
IN
= 0V
Figure 4. AC Testing Load Circuit
A ceramic bypass capacitor value of 0.1 F (as
shown in Figure 4) is recommended in order to
provide the needed filtering. In addition to tran-
sients that are caused by normal SRAM operation,
power cycling can generate negative voltage
spikes on V
as much as one volt. These negative spikes can
cause data corruption in the SRAM while in battery
backup mode. To protect from these voltage
spikes, ST recommends connecting a schottky di-
ode from V
anode to V
= 0V
C L includes JIG capacitance
DEVICE
UNDER
TEST
SS
CC
CC
).
to V
that drive it to values below V
Min
SS
(cathode connected to V
C L = 100pF
645
or 5pF
Max
10
8
AI02326
Unit
pF
pF
1.75V
SS
CC
by
,